Sharp ER-A750 Service Manual page 50

3) Terminal Name and Description (MB62H149)
23.9 ±
64
65
INDEX
80
LEAD
1
0.8 ±
0.15
NO
Pin Terminal Host/
No. name Sub
1 CLK Sub
2 — —
3 IORQ Sub
4 MREQ Sub
5 RDS Sub
6 WRS Sub
7 INTS Sub
8 Sub
9 TM0 Sub
10 TM1 Sub
11 MRD Sub
12 VSS —
13 WAIT Sub
14 A15 Sub
16 A9 Sub
17 A8 Sub
18 A5 Sub
19 A4 Sub
20 A1 Sub
21 A0 Sub
22 DAK01 Sub
23 — —
24 MWR0 Sub
25 D7 Sub
26 D6 Sub
27 D5 Sub
28 D4 Sub
29 D3 Sub
30 D2 Sub
31 D1 Sub
32 D0 Sub
33 VDD —
34 — —
0. 6
20
41
24
0.35 ±
0.1
Fig. 7
In/
Description
Out
In Clock in (16 MHz)
— N.U.
In I/O request
In Memory request
In Read from sub
In Write from sub
Out Interrupt to sub
Out Clock out
In Timer 0
Out Timer 1
Out Memory read
— GND
Out Wait signal
Out Address bus for DMA
Out
Out
In
In
In
In
In DMA acknowledge 0+1
— N.U.
Out Memory write
I/O Data bus
I/O
I/O
I/O
I/O
I/O
I/O
I/O
— +5V
— N.U.
Pin Terminal
No. name
35 RES
36 IO/WR
37 IO/RD
38 AEN
39 AST
40
40 TCS
41 DAK23
42 DRQRS
43 DRQWS
44 RDH
45 WRH
46 INTH
47 DAK
48 TCH
25
49 DRQWH
50 DRQWH
51 CS
52 VSS
53 —
54 DB0
55 DB1
56 DB2
57 DB3
58 DB4
59 DB5
60 DB6
61 DB7
62 AB0
63 —
64 AB1
65 COL
66 RDI
67 TDI
68 RTS
69 RXC
70 RXD
71 TXC
72 TXD
73 VDD
74 E
75 IRQ
76 LCS
77 —
78 RS1
79 RS0
80 MSK
7 – 20
Host/ In/
Description
Sub Out
Host In Reset
Sub I/O I/O write
Sub I/O I/O read
Sub In Address enable from DMAC
Sub In Address strobe from DMAC
Sub In Terminal count
Sub In DMA acknowledge 2+3
Sub Out DMA request read to sub
Sub Out DMA request write to sub
Host In Read from Host
Host In write from Host
Host Out Interrupt to host
Host In DMA acknowledge from host
Host In Terminal count from host
Host Out DMA request read to host
Host Out DMA request write to host
Host In Chip select from host
— — GND
— — N.U.
Host I/O Data bus
Host I/O Data bus
Host I/O Data bus
Host I/O Data bus
Host I/O Data bus
Host I/O Data bus
Host I/O Data bus
Host I/O Data bus
Host In Address bus from host
— — N.U.
Host In Address bus from host
Sub In Collision detect signal
Sub In Receive data from receiver
Sub Out Transmmit data to driver
Sub In Request to send
Sub Out Receive clock to ADLC
Sub Out Receive data to ADLC
Sub Out Transmmit clock
Sub In Transmmit data
— — +5V
Sub In Enable clock to ADLC
Sub In Interrupt request from ADLC
Sub Out Link controller chip select
— — N.U.
Sub Out Register select 1
Sub Out Register select 0
Sub Out Mask signal