SOYO SY-5SSM User's Manual & Technical Reference page 55

BIOS Setup Utility
CHIPSET FEATURES SETUP (Continued)
CHIPSET
FEATURES
Memory Hole
At 15M-16M
PCI Post
Write Buffer
PCI Delayed
Transaction
Spread
Spectrum
Setting
Disabled
Enabled
0.5-8 MB
Disabled
Enabled
Disabled
Enabled
Disabled
0.25%(Cntr)
0.50%(Down) When using Spread
SY-5SSM & SY-5SSM/5 V1.1
Description
Some interface cards will
map their ROM address to
this area. If this occurs,
select [Enabled] in this field.
Enable/disable PCI post
write buffer.
The chipset has an
embedded 32-bit posted
write buffer to support delay
transactions cycles. Select
Enabled to support
compliance with PCI
specification version 2.1.
When using Spread
Spectrum 0.25%(Cntr) for
FCC or DOC testing.
Spectrum 0.50%(Down) for
FCC or DOC testing.
51
Note
Default
Default
Default
Default