Table 11.2-3 Setting The A/D Conversion Start Channel; Table 11.2-4 Setting The A/D Conversion End Channel - Fujitsu MB91F109 FR30 Hardware Manual

<Note>
A/D conversion that is started in continuous conversion mode or convert-and-stop mode
continues until the BUSY bit stops it.
Writing "0" to the BUSY bit stops A/D conversion.
"No restart is enabled" in single conversion, continuous conversion, or convert-and-stop mode
applies to all start causes including the timer, external trigger signal, and software.
[bit 5, 4, 3] ANS2, ANS1, ANS0 (ANalog Start channel set)
These bits are used to set the A/D conversion start channel.
When started, the A/D converter begins A/D conversion with the channel selected by these
bits.

Table 11.2-3 Setting the A/D Conversion Start Channel

ANS2 ANS1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
When read, these bits indicates the channel over which A/D conversion is being performed.
When read while the A/D converter is stopped in convert-and-stop mode, the bits indicate
the channel over which A/D conversion has been previously completed.
These bits are initialized to "000" when the register is reset.
[bit2, 1, 0] ANE2, ANE1, ANE0 (ANalog End channel set)
These bits are used to set the A/D conversion end channel.

Table 11.2-4 Setting the A/D Conversion End Channel

ANE2 ANE1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
ANS0 Start channel
0 AN0
1 AN1
0 AN2
1 AN3
0 Reserved
1 Reserved
0 Reserved
1 Reserved
ANE0 End channel
0 AN0
1 AN1
0 AN2
1 AN3
0 Reserved
1 Reserved
0 Reserved
1 Reserved
11.2 Control Status Register (ADCS)
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