MB86R12 Application Note
DDR3 Interface PCB Design Guideline
4.6.
ZQ/ODT setting
Table 4-3 shows the ZQ setting conditions.
Table 4-3 ZQ setting conditions
Group name
Output impedance of MB86R12 I/O (RON)
MCK_Group
MDQSx_Group
MDQx_Group
MCNTL_Group
MCMD_Group
Table 4-4 shows the recommended ODT setting conditions for MDQSx_Group and MDQx_Group signals.
Table 4-4 ODT setting conditions
Operating condition
Write to DDR3_SDRAM
Read from DDR3_SDRAM
FUJITSU SEMICONDUCTOR CONFIDENTIAL
40Ω
48Ω
Perform the ZQ calibration, and set it
48Ω
automatically.
60Ω
60Ω
MB86R12
Off
40Ω
8
ZQ setting of MB86R12
DDR3_SDRAM
60Ω
Off