Write Circuit; Table 4.2 Write Precompensation Algorithm - Fujitsu MHJ2181AT Product Manual

Theory of Device Operation
signal (WUS) when a write error occurs due to head short-circuit or head
disconnection.
The Pre AMP sets the write current and bias current which flows through MR
devices.

4.6.2 Write circuit

The write data is output from the hard disk controller (HDC) with the NRZ data
format, and sent to the encoder circuit in the RDC. The NRZ write data is
converted from 16-bit data to 17-bit data by the encoder circuit then sent to the
PreAMP, and the data is written onto the media.
(1) 16/17 MTR MEEPRML
This device converts data using the 16/17 (Maximum Transitions Run) algorithm.
This code is converted so that a maximum of three 1's are placed continuously
and so that there are two or fewer 1's in a 17-bit border.
(2) Write precompensation
Write precompensation compensates, during a write process, for write non-
leneartiry generated at reading. Table 4.2 shows the write precompensation
algorithm.

Table 4.2 Write precompensation algorithm

4-10
Bits Compensation
111001
111010
:
111111
000000
000001
:
010000
:
100000
–7
–6
–1
0
+1
+16
+32
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