Intel 5148LV - Xeon Dual Core Active H Datasheet page 13

Introduction
• Dual-Core Intel
intended for dual processor servers and workstations. The Dual-Core Intel
Processor 5100 Series are based on Intel's 65 nanometer process, in the FC-LGA6
package with two processor cores. For this document, "processor" is used as the
generic term for the Dual-Core Intel
• Dual-Core Intel® Xeon® Processor LV 5148, Dual-Core Intel® Xeon®
Processor LV 5138 and Dual-Core Intel® Xeon® Processor LV 5128- Intel
64-bit microprocessor intended for dual processor server blades and embedded
servers requiring higher case temperatures. The Dual-Core Intel® Xeon®
Processor LV 5148, Dual-Core Intel® Xeon® Processor LV 5138, and Dual-Core
Intel® Xeon® Processor LV 5128 are lower voltage, lower power version of the
Dual-Core Intel
Intel® Xeon® Processor LV 5148/5138/5128" is used to call out specifications that
are unique to the Dual-Core Intel® Xeon® Processor LV 5148/5138/5128 SKU.
• Dual-Core Intel® Xeon® Processor 5160- A performance optimized version of
the Dual-Core Intel® Xeon® Processor 5100 Series. For this document "Dual-Core
Intel® Xeon® Processor 5160" is used to call out specifications that are unique to
the Dual-Core Intel® Xeon® Processor 5160 SKU.
• FC-LGA6 (Flip Chip Land Grid Array) Package – The Dual-Core Intel
Processor 5100 Series package is a Land Grid Array, consisting of a processor core
mounted on a pinless substrate with 771 lands, and includes an integrated heat
spreader (IHS).
• LGA771 socket – The Dual-Core Intel
the baseboard through this surface mount, 771 Land socket. See the LGA771
Socket Design Guidelines for details regarding this socket.
• Processor core – Processor core with integrated L1 cache. L2 cache and system
bus interface are shared between the two cores on the die. All AC timing and signal
integrity specifications are at the pads of the processor core.
• FSB (Front Side Bus) – The electrical interface that connects the processor to the
chipset. Also referred to as the processor system bus or the system bus. All
memory and I/O transactions as well as interrupt messages pass between the
processor and chipset over the FSB.
• Dual Independent Bus (DIB) – A front side bus architecture with one processor
on each bus, rather than a FSB shared between two processor agents. The DIB
architecture provides improved performance by allowing increased FSB speeds and
bandwidth.
• Flexible Motherboard Guidelines (FMB) – Are estimates of the maximum
values the Dual-Core Intel
time periods. The values are only estimates and actual specifications for future
processors may differ.
• Functional Operation – Refers to the normal operating conditions in which all
processor specifications, including DC, AC, FSB, signal quality, mechanical and
thermal are satisfied.
• Storage Conditions – Refers to a non-operational state. The processor may be
installed in a platform, in a tray, or loose. Processors may be sealed in packaging or
exposed to free air. Under these conditions, processor lands should not be
connected to any supply voltages, have any I/Os biased or receive any clocks.
Upon exposure to "free air" (that is, unsealed packaging or a device removed from
packaging material) the processor must be handled in accordance with moisture
sensitivity labeling (MSL) as indicated on the packaging material.
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Dual-Core Intel Xeon Processor 5100 Series Datasheet
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Xeon Processor 5100 Series – Intel 64-bit microprocessor
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Xeon
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Xeon Processor 5100 Series. For this document "Dual-Core
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Xeon Processor 5100 Series will have over certain
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Processor 5100 Series.
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Xeon Processor 5100 Series interfaces to
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Xeon
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Xeon
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