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Addressing Modes; Linear Addressing Mode - Texas Instruments TMS320C67X Reference Manual

Dsp and cpu instruction set

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Addressing Modes

3.8 Addressing Modes
3.8.1

Linear Addressing Mode

3.8.1.1
LD and ST Instructions
3.8.1.2
ADDA and SUBA Instructions
3-30
Instruction Set
The addressing modes on the C67x DSP are linear, circular using BK0, and
circular using BK1. The addressing mode is specified by the addressing mode
register (AMR), described in section 2.7.3.
All registers can perform linear addressing. Only eight registers can perform
circular addressing: A4−A7 are used by the .D1 unit and B4−B7 are used by
the
.D2
unit.
No
LDB(U)/LDH(U)/LDW, STB/STH/STW, ADDAB/ADDAH/ADDAW/ADDAD,
and SUBAB/SUBAH/SUBAW instructions all use AMR to determine what
type of address calculations are performed for these registers.
For load and store instructions, linear mode simply shifts the offsetR/cst
operand to the left by 3, 2, 1, or 0 for doubleword, word, halfword, or byte
access, respectively; and then performs an add or a subtract to baseR
(depending on the operation specified).
For the preincrement, predecrement, positive offset, and negative offset
address generation options, the result of the calculation is the address to be
accessed in memory. For postincrement or postdecrement addressing, the
value of baseR before the addition or subtraction is the address to be accessed
from memory.
For integer addition and subtraction instructions, linear mode simply shifts the
src1/cst operand to the left by 3, 2, 1, or 0 for doubleword, word, halfword, or
byte data sizes, respectively, and then performs the add or subtract specified.
other
units
can
perform
circular
addressing.
SPRU733

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