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For a given channel, read the register value to determine the MSE (Mean Square Error), convert to decimal, and
refer to the following table to determine link quality:
For information on how to read and write registers in the extended register space, please refer to
2.6 Built-in Self Test With Various Loopback Modes
Loopback feature for debug:
Loopback mode could determine the communication issue occur on MAC < -- > PHY or PHY < -- > PHY.
MII loopack, PCS loopback, Digital Loopback, and Analog Loopback could isolate the PHY < -- > PHY
communication. Reverse Loopback could isolate the MAC < -- > PHY communication. The following diagrams
illustrate the various loopback mode that DP83867 have:
MAC /
Switch
MII Loopback
MAC/
Switch
Analog loopback is typically used to verify the PHY's full internal data path, while reverse loopback is used with a
link partner to verify the data path along the MDI.
SNLA246C – OCTOBER 2015 – REVISED APRIL 2024
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Table 2-6. MSE Link Quality Ranges
Link Quality
Excellent
Good
Poor
PCS Loopback
M
I
PCS
I
PHY Digital
Digital Loopback
Figure 2-9. Block Diagram, Loopback Modes
M
Signal
I
PCS
Process
I
PHY Digital
Reverse Loopback
Figure 2-10. Block Diagram, Reverse Loopback Mode
Copyright © 2024 Texas Instruments Incorporated
MSE Range
< 522
522 - 827
> 827
Analog Loopback
Signal
PHY
Process
AFE
XFMR
CAT5 Cable
PHY
&
AFE
RJ45
Copyright © 2016, Texas Instruments Incorporated
Troubleshooting the Application
Section
3.8.
XFMR
&
RJ45
Link Partner
DP83867 Troubleshooting Guide
11
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