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Table 6-32.Processor Power Signals (Sheet 2 of 3)
Signal Name
VID[5:3]/CSC[2:0]
VID[2:0]/MSID[2:0]
VTT_SELECT
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
VAXG_SENSE
VSSAXG_SENSE
GFX_VID[6:0]
GFX_VR_EN
82
VID[6]
VID[6:0] (Voltage ID) Pins: Used to
support automatic selection of power supply
voltages (VCC). These are CMOS signals that
are driven by the processor.
CSC[2:0]/VID[5:3] - Current Sense
Configuration bits, for ISENSE gain setting.
This value is latched on the rising edge of
VTTPWRGOOD.
MSID[2:0]/VID[2:0]- Market Segment
Identification is used to indicate the
maximum platform capability to the
processor. A processor will only boot if the
MSID[2:0] pins are strapped to the
appropriate setting (or higher) on the
platform (see
encodings). MSID is used to help protect the
platform by preventing a higher power
processor from booting in a platform
designed for lower power processors.
MSID[2:0] are latched on the rising edge of
VTTPWRGOOD.
NOTE: VID[5:3] and VID[2:0] are bi-
directional. As an input, they are CSC[2:0]
and MSID[2:0] respectively.
The VTT_SELECT signal is used to select the
correct VTT voltage level for the processor.
Voltage Feedback Signals to an Intel MVP-6.5
Compliant VR: Use VCC_SENSE to sense
voltage and VSS_SENSE to sense ground
near the silicon with little noise.
Isolated low impedance connection to the
processor VTT voltage and ground. They can
be used to sense or measure voltage near
the silicon.
VAXG
Graphics core power rail.
VAXG_SENSE and VSSAXG_SENSE provide
an isolated, low impedance connection to the
VAXG voltage and ground. They can be used
to sense or measure voltage near the silicon.
GFX_VID[6:0] (Voltage ID) pins are used to
support automatic selection of nominal
voltages (VAXG). These are CMOS signals
that are driven by the processor.
GPU output signal to Intel MVP6.5 compliant
VR. This signal is used as an on/off control to
enable/disable the GPU VR.
Description
Table 7-36
for MSID
Signal Description
Direction/Buffer
Type
O
CMOS
O
CMOS
O
A
O
A
Ref
O
A
O
CMOS
O
CMOS
Datasheet
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