Dmipvccap1-Dmi Port Vc Capability Register 1; Dmipvccap2-Dmi Port Vc Capability Register 2 - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.12.2 DMIPVCCAP1—DMI Port VC Capability Register 1
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
31:7
6:4
3:3
2:0
2.12.3 DMIPVCCAP2—DMI Port VC Capability Register 2
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
31:24
23:8
7:0
Datasheet, Volume 2
0/0/0/DMIBAR
4–7h
00000000h
RO, RW-O
32 bits
0000000h
Reset RST/
Attr
Value PWR
RO 0h
RO 000b Uncore
RO 0h
RW-O 000b Uncore
0/0/0/DMIBAR
8–Bh
00000000h
RO
32 bits
0000h
Reset RST/
Attr
Value PWR
RO 00h Uncore
RO 0h
RO 00h Uncore
Description
Reserved
Low Priority Extended VC Count (LPEVCC)
This field indicates the number of (extended) Virtual Channels in
addition to the default VC belonging to the low-priority VC (LPVC)
group that has the lowest priority with respect to other VC
resources in a strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
Extended VC Count (EVCC)
This field indicates the number of (extended) Virtual Channels in
addition to the default VC supported by the device.
Description
Reserved for VC Arbitration Table Offset (VCATO)
Reserved
Reserved for VC Arbitration Capability (VCAC)
187