Board - Sony DXC-390 Service Manual

3-4. SG-265 Board
The microprocessor communicates a data with each board,
and controls a camera.
And, by external sync circuit around the Gen.Lock IC,
sync mode is discriminated and sync source signal is
separated. These construct 4fsc clock PLL.
. . . . . Microprocessor IC107 (uPD70F3017)
This is 32-bit RISC microprocessor of a flash type. The
clock frequency uses 17 MHz (X101).
Program write terminal is common use with the commu-
nication terminal (UART), a change connection performs
between software rewrite in IC102 and normal commu-
nication.
IC101 is EEPROM stored camera setting data.
. . . . . Character generator block
The clock uses 7 MHz that is divided 14 MHz to half in
IC103.
The character and Key signal are made in IC111, are
input to CXD9087R.
. . . . . External communication block
One is RS232C, communicates with external through
driver circuit (IC112).
Another is CCU protocol, takes on sending in Q102 and
receiving in Q101.
. . . . . Iris value converter block
In the exclusive lens for DXC-390, an iris value gets as
voltage.
Its voltage is adapted for a dynamic range of A/D convert-
er of the microprocessor in IC115, is taken the micropro-
cessor.
. . . . . Sync signal generator (IC231)
Each kind sync signal (HD, VD, FLD, LALT, BF and
OBLK) is output.
DXC-390/390P
. . . . . External sync signal (VBS and HD/VD)
Sync mode is discriminated by a input sync source signal
from external. SYNC and BURST are separated from its
signal and input to IC230, compare phase with the
internal HD and SC signals.
In the VBS external sync mode, 4fsc clock signal is
synchronized in SC-PLL whichever NTSC and PAL
systems. In the HD/VD external sync mode, it is syn-
chronized only PAL system.
In the internal sync mode and HD/VD external sync
mode of NTSC system, PLL is not consisted, VCXO is
generated by a fixed voltage.
HD and SC phase on those external sync mode are ad-
justed.
And, a sync source signal is changed amplitude to 5 Vp-p
after through buffer and separated.
3-3 (E)