Qspi Vs Full Address Nor Flash Multiplexing; Gpmc And Mmc2 Multiplexing; Qspi Vs Full Address Nor Flash Booting Mux Control; Gpmc And Mmc2 Selection Table - Texas Instruments DRA7 Series User Manual

Evm cpu board
Table of Contents

Advertisement

www.ti.com
Table 13. QSPI vs Full Address NOR Flash Booting Mux Control
Muxing Resistors
Interface
Mounted
QSPI
R735, R737, R739,
R741,R743, R745,
R747
GPMC
R736, R738, R740,
R742, R744, R746,
R748
QSPI
(1) Best PCB Signal Integrity (SI) routing is default configuration via Resistor Bypass Path for QSPI signaling.
(2) Most flexible routing is optional configuration via Bus Logic Switch pending SI validation for QSPI signaling.
(3) GPIO Expander (U57) connection to "nQSPI_BOOT" net is intended as a "read-only" feature to determine boot image source
(QSPI or NOR). Boot image selection must be set before power on sequence.
(4) GPIO Expander (U57) is accessible via I2C1, address 0x21.
3.4.3
GPMC Vs MMC2
Multiplex control logic for GPMC and MMC2 is shown in
The default interface are the GPMC signals; the selection table is shown in
GPMC vs MMC2
GPMC/MMC2
SPRUI50 – February 2016
Submit Documentation Feedback
Figure 7. QSPI vs Full Address NOR Flash Multiplexing
Muxing Resistors
"Not-Mounted"
R736, R738, R740,
R742, R744, R746,
R748
R735, R737, R739,
R741, R743, R745,
R747
Figure 8. GPMC and MMC2 Multiplexing
Table 14. GPMC and MMC2 Selection Table
MMC2_BOOT
1
0
Copyright © 2016, Texas Instruments Incorporated
Signal Path
QSPI_BOOT (3),
Resistor Bypass
(1)
NA
Bus Switch
(2)
Low
(SW5.P4 = ON)
High
(SW5.P4 = OFF)
Figure
8.
Table
Interface
GPMC
MMC2
Hardware
(4)
Device
QSPI Flash
QSPI Flash
NOR Flash
14.
Device
NOR Flash
eMMC
17
DRA7x EVM CPU Board

Advertisement

Table of Contents
loading

Table of Contents