Signal Multiplex Logic; Cpu Board Switch And Button Locations (Rev G And Later) - Texas Instruments DRA7 Series User Manual

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Figure 5. CPU Board Switch and Button Locations (Rev G and later)
3.4

Signal Multiplex Logic

A high level of internal I/O signal multiplexing is supported to maximize silicon functionality available at
package balls. Likewise, the CPU board design uses a combination of FET switch and passive resistor
multiplexers to route the signals to different functional blocks or peripheral components to maximize
development platform system functionality. The following sections and diagrams will illustrate the flexibility
of the on-die and CPU's on-board signal multiplexing options.
3.4.1 NOR/NAND Booting vs FPD-Link Video
A high level of internal I/O signal multiplexing is supported to maximize silicon functionality available at the
package balls. Likewise, the CPU board design uses a combination of FET switch and passive resistor
multiplexers to route the signals to different functional blocks or peripheral components to maximize
development platform system functionality. The following sections and diagrams illustrate the flexibility of
the on-die and CPU's on-board signal multiplexing options.
SPRUI50 – February 2016
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