Configuration Eeprom Definition Table - Texas Instruments DRA7 Series User Manual

Evm cpu board
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Hardware
3.5.2
User Interface LED's
The board has four user interface LEDs for debug, status indication and so on. Details about the user
interface LED and its GPIO assignment is shown in
3.5.3
Configuration EEPROM
The CPU board contains an EEPROM memory device for storing and retrieving configuration information.
The EEPROM provides 256Kb (or 32KBytes) of storage space, and is accessible via I2. Device location
information is located in
of manufacturing, and should not be altered.
EEPROM.
EEPROM Field
ID.HEADER
ID.BOARD_NAME
ID.VERSION_MAJOR
ID.VERSION_MINOR
ID.CONFIG_OPTION
EMIF1_SIZE_BYTES
EMIF2_SIZE_BYTES
RESERVED
MAC_ADDR
(1) If Bit 2 is set to 0, all EEPROM data beyond that is set to 0 (Not defined or Used). If set to 1, the mapping is per the table.
(2) Prior to Rev H, Bytes [55:28] were reserved and set to 0x0.
For reference, a C-style coded structure is provided:
Struct EEPROM_ID_T
{
Unsigned long header;
Char board_name[16];
Unsigned short version_major;
Unsigned short version_minor;
Unsigned long config_option;
Unsigned long emif1_size_bytes;
Unsigned long emif2_size_bytes;
Char reserved[28];
} eeprom_id;
26
DRA7x EVM CPU Board
Table
24. The configuration ID information is programmed by the factory at time
Table 26. Configuration EEPROM Definition Table
Value
Byte
(Rev H CPU board
Location
example)
[3:0]
0xAA5533EE
[19:4]
'5777xCPU-DDR3'
(ascii)
[21:20]
0x7
[23:22]
0x0
[27:24]
0x3E
[31:28]
0x8000 0000
[35:32]
0x8000 0000
[55:36]
0x0
0x7F00
00.0E.99.zz.yy.xx
4
16
2
2
4
4
4
20
56 Bytes
Copyright © 2016, Texas Instruments Incorporated
Table
25.
Table 26
shows the configuration data format within the
Description
Fixed value at start of header ID.
Fixed value of '5777xCPU' or '5777xCPU-DDR3'
A=0x1
B=0x2
C=0x3
D=0x4
E=0x5
F Skipped
G=0x6
H=0x7
0x0 for major revision
0x1-0x15 for others
Bit 6: 1 – EMIF2 ECC Supported, 0 - No
Bit 5: 1 – EMIF2 Supported, 0 – No
Bit 4: 1 – EMIF1 ECC Supported, 0 – No
Bit 3: 1 – EMIF1 Supported, 0 – No
Bit 2: 1 – Extended Memory EEPROM Cfg Support, 0 – No
Bit 1: 1 – MAC addr in EEPROM (default)
Bit 0: 0 - QSPI (default), 1 - NOR
Memory size for EMIF1 in bytes (unsigned long)
Memory size for EMIF2 in bytes (unsigned long)
Reserved
(2)
Optional MAC address
www.ti.com
(1)
(2)
(2)
SPRUI50 – February 2016
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