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Circuit Description
The image data from SI terminal of CIS is supplied to LM393 to be separated into black or white based upon comparator
reference voltage, and is input to PFE ADDO.
Comparator reference voltage is determined for ABC contro! span, selecting 1184 pels among 1728 pels using image data
from SI of CIS by means of TC4S66F analog swich.
If the input image level, obtaining from R4, R5 voltage division, is lower than 0.9V, comparator reference input is supplied as
0.9V.
@ Video Processing
Black and white image data from LM393 passes ADDO and MUX to be stored in line buffer.
The stored image data is sent to either printer or modem depending on copy mode.
Video processing block diagram is as follows.
Shift Register
LINE BUFFER
Hardware RAM
Inversion
Table
COMPARATOR
EXTERNAL
Shading
RAM
Table
8X6
MULTIPLIER
Shading
RAM
Control
ADD(0-5]
[Fig. 5]
5) Operator Panel Interface
PFE is designed to control 4 by 4 key matrix and 4 LEDs.
OPO 0~3 : Used as keybiard strobe and LED driver.
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OPI
0~3 : Used as leads for key scan from key matrix.
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