Schematic Diagrams (1/27); Front Unit (1/1) - Marantz SR5008 Service Manual

W9864G6JH-6 (HDMI : U2002)
W9864G6JH-6 Pin description
5. PIN DESCRIPTION
PIN NUMBER
24, 25, 26, 27, 60, 61, 62,
63, 64, 65, 66
22, 23
2, 4, 5, 7, 8, 10, 11, 13, 31,
33, 34, 36, 37, 39, 40, 42,
45, 47, 48, 50, 51, 53, 54,
56, 74, 76, 77, 79, 80, 82,
83, 85
16, 28, 59, 71
1, 15, 29, 43
44, 58, 72, 86
3, 9, 35, 41, 49, 55, 75, 81
6, 12, 32, 38, 46, 52, 78, 84
14, 21, 30, 57, 69, 70, 73
PIN NAME FUNCTION
A0−A10
BS0, BS1 Bank Select
DQ0−DQ31
Input/ Output
20 Chip Select
CS
Row Address
19
RAS
Column Address
18
CAS
17 Write Enable
WE
Input/Output
DQM0 − DQM3
68 CLK Clock Inputs
67 CKE Clock Enable
V
DD
V
SS
Power for I/O
V
DDQ
Ground for I/O
V
SSQ
NC No Connection No connection.
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DESCRIPTION
Multiplexed pins for row and column address.
Row address: A0−A10. Column address: A0−A7.
Address
A10 is sampled during a precharge command to
determine if all banks are to be precharged or
bank selected by BS0, BS1.
Select bank to activate during row address latch
time, or bank to read/write during address latch
time.
Data
Multiplexed pins for data output and input.
Disable or enable the command decoder. When
command decoder is disabled, new command is
ignored and previous operation continues.
Command input. When sampled at the rising
edge of the clock RAS , CAS and WE
Strobe
define the operation to be executed.
Referred to RAS
Strobe
Referred to RAS
The output buffer is placed at Hi-Z (with latency
of 2) when DQM is sampled high in read cycle.
Mask In write cycle, sampling DQM high will block the
write operation with zero latency.
System clock used to sample inputs on the rising
edge of clock.
CKE controls the clock activation and
deactivation. When CKE is low, Power Down
mode, Suspend mode, or Self Refresh mode is
entered.
Power for input buffers and logic circuit inside
Power
DRAM.
Ground for input buffers and logic circuit inside
Ground
DRAM.
Separated power from VDD, to improve DQ
Buffer noise immunity.
Separated ground from VSS, to improve DQ
Buffer noise immunity.
Publication Release Date: Aug. 28, 2009
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160
W9864G2IH
Revision A03