Circuit Description; Video Circuit - Sony UP-890CE Service Manual

Video graphic printer
Hide thumbs Also See for UP-890CE:
Table of Contents

Advertisement

UP-890CE/890MD
SECTION
5
CIRCUIT
DESCRIPTION
5-1. VIDEO
CIRCUIT
5-1-1. Operation
A composite video signal is input from the BNC
connector(CN1-(VIDEO-IN))
to the
MA-19 board.
The composite video signal is terminated with 75 ohms by R1 and
R2 when the DIP
switch (S302-@2)
is set to ON. The signal then passes
through
the input buffer and branches into three routes. Two of these three signals are input
through
trap circuit
1 (FL1
for NTSC
signal)
and trap circuit
2 (FL2 for PAL
signal) to the analog switch (IC2-@X5)) and selected in accordance with the NTSC or
PAL judgment of a microcomputer. The automatically selected signal and the signal
supplied directly to the input buffer are input to the analog switch (IC2-@@®). An
original signal is selected when the DIP switch (S302-@) is set to ON. A luminance
signal
(Y signal)
from
which
the color subcarrier
signal has been
extracted
by the
trap circuit is selected when it is set to OFF.
The selected signal is input through
the buffer to IC1-@%.
1C1(1) extracts
the C sync signal, (2) emphasizes
the picture,
and (3) adjusts the
contrast.
The
extracted
C sync
signal is output
from IC1-@.
The
degree
of the
picture emphasis does not change because the value of the DC voltage input to IC
1-@
is fixed. The signal gain is controlled
by changing the DC voltage value at IC
1-@ with the CONT control on the front panel.
The gain of the video signal output
from IC1-@ is adjusted with RV1. The dither signal output from IC103-Q@® is injected
into the gain-adjusted signal.
The signal is then band-limited using a low-pass filter
and passed through the clamping circuit.
The clamp level at that time is determined
by RV2 and the BRT control on the front panel.
The video signal is then input to the analog-digital converter (IC3-Q2) and converted
into 6-bit digital data.
The sampling clock for the analog-digital converter is the 18.432 MHz clock output
from IC103-@.
The converted digital data is sent to frame memory (IC104) and digital-
analog converter IC4 and reconverted into analog data. The resultant signal is output
from IC4-©.
Since this signal lacks a sync signal, the sync signal is injected by analog
switch IC2.
An original signal supplied directly to CN1-(VIDEO IN) is output from
CN1-(VIDEO
OUT).
1€103
DITHER SIGNAL
1D
AMPL
IM
ar:
"cot
To «301 @
CNet
VIDEO
ap
ee
ee
sr
eSYMC
EWH-*COMT-+
A
'
'
.
' @
'SEP!
erect ea
lt.
Cwt-2
SYNC
a
'
{SINC LEVEL
t
---!
Fig.5-1.
Video Signal Processing Section
Block Diagram
— 46 —

Advertisement

Table of Contents
loading

This manual is also suitable for:

Up-890md

Table of Contents