Texas Instruments 990 Manual page 27

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Word Select (CRU Output Bit F
16 ).
Word select determines the interpretation attached to the
computer's output, CRUBITOUT, and input, CRUBITINT, by the VDT controller. When Word
Select = 0, the VDT controller's CRU interface logic enables a different set of latches and registers
to accept or output data for the other 15 bits addressed by CRUBIT, 12-15 than are enabled when
Word Select= 1.
NOTE
For the following discussions, it is assumed that CRUBITOUT and
CRUBIT,12-15 have set CRU output bit F
16
to 1 prior to ad-
dressing the bit under discussion.
Cursor Address (CR U Output Bits 0-A
16 ).
These 11 bits define a cursor address for loading
refresh memory and determining the location on the CRT screen where a character is to be
displayed. Cursor Address defines hexadecimal addresses from 0 through ?FF
16 .
The memory on
a "960-character" controller has 1024 locations (0-3FF
16 ).
Only addresses from 0 through
3BF
16
are displayable on a "960-character screen", and addresses from 0 through 77F
16
on a
"1920-character screen". The addresses for which no data is displayed can be used by software.
If the cursor address specifies a nondisplayable location, the cursor is not visible.
Addressing bit A
16
of the cursor address is the VDT controller's indication that a new cursor
address is to be loaded; therefore, this bit must always be output during alteration of the cursor
address.
Bit 9
16
is the most significant bit of the cursor address for a "960-character" display, but as men-
tioned previously, bit A
16
must also be output. CRU output bit Bis not used.
Display Cursor (CRU Output Bit C
16 ).
When set to 1, Display Cursor enables the cursor to be
displayed on the CRT screen as described under Blinking Cursor Enable. Display Cursor is set to
0 during application of power to the system.
Keyboard Acknowledge (CRU Output Bit D
16 ).
Keyboard Acknowledge is the computer's
response to the VDT controller's Keyboard Interrupt signal. When addressed (its value makes no
difference), Keyboard Acknowledge resets Keyboard Data Ready (CRU input bit F
16 ),
Keyboard
Parity Error (CRU input bit E
16
with output bit F
16
= 1 ), and the controller's device interrupt,
NKBINT.
Beep Enable (CR U Output Bit E
16 ).
This bit, when addressed by the computer (its value makes
no difference), causes the VDT controller's audio alarm logic to produce a 0.3-second (nominal)
oscillator enable signal. This enable turns on the 2-kilohertz tone oscillator driving the loudspeaker
in the display unit housing.
Word Select (CRU Output Bit F
16 ).
Word Select determines the interpretation attached to the
computer's output, CRUBITOUT, and input, CRUBITINT, by the VDT controller. When Word
Select
=
0, the VDT controller's CRU interface logic enables a different set of latches and
registers to accept or output data for the other 15 bits addressed by CRUBIT, 12-15 than are
enabled when Word Select = 1.
NOTE
For the following discussions, it is assumed that CRUBITOUT and
CRUBIT 12-15 have set CRU output bit F
16
to 0 prior to ad-
dressing the bit under discussion.
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Digital Systems Division