Texas Instruments 990 Manual page 23

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• CRU Output Data (CRUBITOUT) - CRUBITOUT is the high-active serial output of
the computer. CRUBITOUT provides the 32 bits of information shown in figure 1-9 as
the bits addressed by CRUBIT,12-15. Descriptions of the 32 bits shown in figure 1-9
are found in paragraph 1.3.1.6.
• Store Clock (STORECLOCK-) - STORECLOCK- is the low-active clock produced by
the computer that strobes each bit contained by CRUBITOUT to the address specified
by CRUBIT,12-15 at the positive-going edge of STORECLK-.
STORECLOCK~
has a
pulse width of 50 nanoseconds (nominal) and a period of 250 nanoseconds (nominal).
• CRU Input Data (CRUBITINT) - CRUBITINT is the high-active serial output from
the VDT controller to the computer. CRUBITINT provides the 32 bits of information
shown in figure 1-10 as the bits addressed by CRUBIT,12-15.
• TILINE 1/0 Reset (TLIORES-) - TLIORES- is the low-active system reset signal
that resets all VDT controller devices in response to an RSET instruction or during
application of power to the system. TLIORES- keeps all connected devices reset until
de power to the system is up and stable.
• Terminal Interrupts (NKBINT and NKBINT*) - NKBINT and NKBINT* are the
low-active device interrupt signals for the primary (VDT 0) and optional (VDT 1)
controllers, respectively. Each controller produces its interrupt each time a character
code is received from the keyboard, then awaits the computer's reply, Keyboard
Acknowledge.
1.3.1.6 Software Interface. Figures 1-9 and 1-10 illustrate the 32 output and 32 input bits,
respectively, designated by the system processor with CRUBIT, 12-15. The descriptions of the bit
assignments follow.
NOTE
For the following discussions, it is assumed that CRUBITOUT and
CRUBIT,12-15 have set CRU output bit F
16
to 0 prior to
addressing the bit under discussion.
Display Memory Write Data (CRU Output Bits 0-7
16
With Output Bit 9
16
=
0). These eight bits
represent a character code to be displayed on the CRT screen when Write Data Strobe (CRU out-
put bit 8
16
with output bit F
16
=
0) is issued. The VDT controller latches Display Memory Write
Data and uses it to load refresh memory. Characters read from the displayable portion of refresh
memory produce the video dot codes that cause the symbols to be displayed on the CRT screen.
On the United States and European controller versions, bits 0-6
16
represent a seven-bit character,
and bit 7 (most significant bit) is used to select character intensity. The Japanese controller has
256 characters (Katakana and alphanumeric), and the dual intensity feature is not active, since
bits 0 through 7 are required to describe each character.
1-13
Digital Systems Division