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Schematic Diagrams
Processor 4/7
D
Sheet 5 of 72
Processor 4/7
C
VCCST_PWRGD
B
11,38,39,58
A
39
H_PROCHOT_EC
B - 6 Processor 4/7
5
4
NEAR CPU
1.05V_VCCST
35
PCH_CPU_BCLK_R_DP
R221
R222
35
PCH_CPU_BCLK_R_DN
100_04
56.2_1%_04
35
PCH_CPU_PCIBCLK_R_DP
CPU
CPU
35
PCH_CPU_PCIBCLK_R_DN
58
H_CPU_SVIDDAT
35
CPU_24MHZ_R_DP
58
H_CPU_SVIDALRT#
35
CPU_24MHZ_R_DN
58
H_CPU_SVIDCLK
R223
220_04
CPU
CPU_VIDALERT_N
H_PROCHOT#
R195
499_1%_04
58,64
H_PROCHOT#
CPU
57
DDR_VTT_PG_CTRL
VCCST_PW RGD
R206
60.4_1%_04
CPU
33
H_PW RGD
32
PLTRST_CPU_N
32
H_PM_SYNC
R230
CPU
20_1%_04
32
H_PM_DOW N
R231
CPU
*0402_short
39
H_PECI
32
PCH_THERMTRIP#
R500
CPU
1K_04
1.05V_VCCST
30,34
H_SKTOCC_N
R227
CPU
10K_04
1.05V_VCCST
1.05V_VCCST
VDD3
R203
1K_04
CPU
VCCST_PW RGD
R214
100K_04
D
CPU
5
G
C438
S
Q12B
*0.01u_50V_X7R_04
MTDK3S6R
CPU
D
CPU
2
G
ALL_SYS_PW RGD
S
Q12A
MTDK3S6R
C455
CPU
*0.1u_16V_X7R_04
CPU
1.05DX_VCCSTG
H_PROCHOT#
R186
1K_04
CPU
Q9
C403
G
47p_50V_NPO_04
2SK3018S3
CPU
CPU
R201
100K_04
CAD Note: Capacitor need to be placed
CPU
close to buffer output pin
5
4
3
U172E
?
?
?
B31
BN25
CFG0
R226
CPU
*1K_04
BCLKP
CFG_0
A32
BN27
BCLKN
CFG_1
BN26
R229
CPU
*1K_04
CFG_2
D35
BN28
PCI_BCLKP
CFG_3
C36
BR20
CFG4
R594
CPU
1K_04
PCI_BCLKN
CFG_4
BM20
R225
CPU
*1K_04
CFG_5
E31
BT20
R591
CPU
*1K_04
CLK24P
CFG_6
D31
BP20
R593
CPU
*1K_04
CLK24N
CFG_7
BR23
CFG_8
BR22
CFG_9
BT23
CFG_10
BT22
CFG_11
BM19
CFG_12
BR19
CFG_13
BP19
CFG_14
BH31
BT19
VIDALERT#
CFG_15
BH32
VIDSCK
BH29
BN23
VIDSOUT
CFG_17
H_PROCHOT#_R
BR30
BP23
PROCHOT#
CFG_16
BP22
CFG_19
BT13
BN22
DDR_VTT_CNTL
CFG_18
BR27
SKL_XDP_MBP_0
BPM#_0
SKL_XDP_MBP_1
BT27
BPM#_1
SKL_MBP_2
BM31
BPM#_2
VCCST_PW RGD_CPU
SKL_MBP_3
H13
BT30
VCCST_PWRGD
BPM#_3
BT31
PROCPWRGD
H_TDO
BP35
BT28
RESET#
PROC_TDO
H_TDI
BM34
BL32
PM_SYNC
PROC_TDI
H_PM_DOW N_R
H_TMS
BP31
BP28
PM_DOWN
PROC_TMS
H_PECI_R
BT34
BR28
H_TCK
PECI
PROC_TCK
J31
THERMTRIP#
H_TRST#
BP30
PROC_TRST#
H_PREQ#
BR33
BL30
SKTOCC#
PROC_PREQ#
H_SKTOCC_N
H_PRDY#
BN1
BP27
PROC_SELECT#
PROC_PRDY#
R588
CPU
*0_04
BM30
CATERR#
CFG_RCOMP
FLOAT FOR SKL
BT25
CFG_RCOMP
GND FOR CNL
AT13
ZVM#
H_CATERR_N
AW13
MSM#
AU13
R590
RSVD1
AY13
RSVD2
49.9_1%_04
CPU
5 OF 13
?
CFL_H_62_INT_IP_CRB_CFLH
27,30,31,33,36,38,39,42,47,48,49,51,52,53,54,55,56,57,63,64
3
2
1
INTERNAL USE ONLY
* ALL CFG 1 = NO TERMAINATION ON BOARD DEFAULT HIGH
* ALL CFG 0 = PHYSICAL STRAP LOW ON BOARD
CFG 1.0V
0V
DESCRIPTION
0
NORM
STALL
EAR
1
NORM
PCHLESS
PCHLESS MODE
2
NORM
REVERSE
PEG_LANE_REVERSAL -SEE PCIE CHAPTER
3
ENABLED
DISABLED
PHYSICAL_DEBUG_ENABLED
4
DISABLED
ENABLED
DP_PRESENCE
5
DISABLED
ENABLED
PEG0CFGSEL[0]
6
DISABLED
ENABLED
PEG0CFGSEL[1]
7
RESET#
BIOS REQ
PEG_DEFER_TRAINING
8
DISABLED
ENABLED
CFG UNLOCK
9
PRESENT
NOT PRESENT
SVID NOT PRESENT
10
ACTIVATE
NOT ACTIVATED
SAFE MODE BOOT
11
HALF-SWING
FULL-SWING
DMI_AC_COUPLED DC COUPLED AC COUPLED
12
PMSYNC2.0
LEGACY
STALL
13
ASYNCHRONOUS
SYNCHRONOUS
SYNC AND AYNC MODE
14
RESERVED
15
RESERVED
PEG CONFIG TABLE
CFG[6:5] 11:DEFAULT X16
10:2X8; 01:RESERVED
CFG6
CFG5
PEG CONFIG
00:X8,X4,X4
0V
0V
X 8 X 4 X 4
0V
10V
RESERVED
10V
0V
X 8 X 8
10V
10V
X 16
* ALL CFG 0 = PHYSICAL STRAP HIGH
* ALL CFG 1 = PHYSICAL STRAP LOW
1.05DX_VCCSTG
H_TDO
R595
100_04
CPU
H_TCK
R592
51_04
CPU
3.3VA
H_SKTOCC_N
R228
100K_04
CPU
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[05]Processor E/13-CLK/JTAG
[05]Processor E/13-CLK/JTAG
[05]Processor E/13-CLK/JTAG
7,33,54
1.05DX_VCCSTG
7,54,56,58
1.05V_VCCST
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P95E0-D02A
6-71-P95E0-D02A
6-71-P95E0-D02A
30,33,34,36,38,53,54
3.3VA
A3
A3
A3
P950ER
P950ER
P950ER
VDD3
Date:
Date:
Date:
Monday, February 12, 2018
Monday, February 12, 2018
Monday, February 12, 2018
Sheet
Sheet
Sheet
5
5
5
o f
o f
o f
2
1
D
C
B
A
R e v
R e v
R e v
D02A
D02A
D02A
72
72
72
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