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Schematic Diagrams
PEX_VDD
A
Cold boot/Optimus: 1V8_AON
GC6 2.1 Exit: 1V8_RUN
Sheet 55 of 72
PEX_VDD
B
GPU
C
GPU
D
B - 56 PEX_VDD
1
2
3
Open VREG Type 0
5V
PC173
PR216
22u_6.3V_X5R_06
10_06
PU11
PWR_PEX
PWR_PEX
EM5841BVT
PR222
GND
10K_04
DFN10
3.3V
COMMON
PWR_PEX
0.200
PEX_VDD_PWRGD
9
PGOOD
VIN
PWR_PEX
OpenVReg
10
EN/FS
29
NV_PEXVDD_EN
BOOT/NC
PC179
2
VCC
SW
*0.1u_16V_X7R_04
SW
PWR_PEX
PC175
GND
1
FB
GND
0.1u_16V_X7R_04
THERM
PWR_PEX
GND
PWR_PEX
GND
1 V8_ RUN
NVVD D
NVVD D S
PEX_ VDD
NVVDD_L
NVVDD_ S
PEX_ V DD or 1V8 _ R UN
1V8_AON
1V8_MAIN
GC6_FB_EN
NVVDD
NVVDDS
VR Complex
1V8_MAIN_EN
PEX&1.05V
FBVDD/Q
GPU_PWR_EN
GPU_EVENT#
GPU_RST#
EC/PCH
SYS_PEX_RST_MON#
PLATFORM_RST#
GPU_PEX_RST_HOLD#
GC6 2.1 Control Signals
1.1V8_MAIN_EN
2.GC6_FB_EN
3.GPU_EVENT#
4.GPU_PEX_RST_HOLD#
5.SYS_PEX_RST_MON#
GPU_PEX_RST#
GPU_PWR_EN
EN
PGOOD
GC6 2.1 - VR Complex
(SYSTEM)
1. GPU_PWR_EN
1V8_AON
2.
1V8_MAIN_EN
1V8_AON
3. GC6_FB_EN
PGOOD
EN
PGOOD
EN
PEX&1.05V
1V8_MAIN_EN
1V8_MAIN
GPPG8_PCH_1V8RUN_EN
EN
PGOOD
GPPG9_PCH_NV3V3_EN
NVVDD
GPPG10_PCH_NVVDD_EN
GPPG11_PCH_NVVDDS_EN
EN
PGOOD
GPPG0_PCH_PEXVDD_EN
FBVDD/Q
GC6_FB_EN
1
2
3
4
5
PEX_VDD
2.6Amps @ 1.0V
PC167
PR212
0.1u_16V_X7R_04
10K_1%_04
PWR_PEX
PWR_PEX
GND
PR213
*160K_04
3
PWR_PEX
PL8
PEX_VDD_R
8
PC172
*0.01u_50V_X7R_04
0.400
1
2
1
2
2.2uH_4*4*2.0
PWR_PEX
PJ24
PC158
PWR_PEX
6
*3mm
7
PWR_PEX
4
5
11
PR211
*20mil short-p
PR209
*20mil short-p
PC165
3300p_50V_X7R_04
PWR_PEX
PWR_PEX
PWR_PEX
GND
PWR_PEX
Rt
PR210
6.8K_1%_04
Vout= Vref * (1+(Rt/Rb))
PWR_PEX
Rb
PR224
9.31K_1%_04
1.050V= 0.6 * (1+(7.5K/10K))
PWR_PEX
F B V D D Q
NVVD D_ L
NVV DD _ S & PEX _ V D D
VIN
PWR_SRC_NV_FB
U2
RS1
0.400
INS153006366
4
1
QFN16
3
2
PWR_SRC_VINP_R
R95
10_1%_04
PWR_SRC_VINP
COMMON
RL1632T4F-B-R005-FNH
H/W SW
12
COMMON
R90
665K_1%_04
C295
VIN1P
GND
1%
1206
H/W SW
10u_6.3V_X5R_06
H/W SW
H/W SW
11
VIN1N
PWR_SRC_VINN_R
PWR_SRC_VINN
R94
H/W SW
10_1%_04
R38
10_1%_04
VIN2P
15
61
PWR_SRC_NV_VINP_R
VIN2P
H/W SW
R39
665K_1%_04
C229
GND
H/W SW
10u_6.3V_X5R_06
H/W SW
14
VIN2N
NVVDD
R37
10_1%_04
VIN2N
61
PWR_SRC_NV_VINN_R
H/W SW
H/W SW
2
VIN3P
NVVDDS
H/W SW
1
VIN3N
8
WARN
9
CRIT
1V8_AON
INA3221AIRGV
PWR_SRC_WARN*
R78
10K_04
R79
H/W SW
PWR_SRC_CRTCAL*
R88
10K_04
R85
H/W SW
DG P.93
note: t1(from 1V8_RUN_EN to PEX_VDD/NVVDD_PG) must NOT exceed 4ms.
N17E
POWER ON SEQUENCE
net
PCH_GPIO
Voltage
DGPU_PWR_EN
(GPP_F23)
(1V8_AON)
(GPP_G8)
(1V8_MAIN)
(GPP_G9)
(NV3V3)
(GPP_G10)
(NVVDD)
(GPP_G11)
(NVVDDS)
(GPP_G0)
(PEX_VDD)
FBVDDQ
4
5
6
7
8
PEX_VDD
PC154
PC152
PEX_VDD_R
VDD3
R400
10_06
PWR_PEX
R403
Q33A
PWR_PEX
PWR_PEX
100K_04
D
MTDK5S6R
PWR_PEX
2
G
PWR_PEX
S
GND
Q33B
D
MTDK5S6R
NV_PEXVDD_EN
5
G
PWR_PEX
S
NV3V3
NV3V3
C282
R72
4
0.01u_50V_X7R_04
*10K_04
VS
GND
H/W SW
H/W SW
I2CC_SCL
6
SCL
I2CC_SDA
I2CC_SCL
27,55
7
SDA
I2CC_SDA
27,55
PWR_SRC_IMON_A0
5
R68
10K_04
A0
Place resistors
H/W SW
close to IC
GND
10
PV
13
TC
16
VPU
14,26
PEX_VDD
12,13,14,27,54,61
NV3V3
61,63
PWR_SRC_NV_FB
3
GND
11,44,47,49,51,54,57,58,62
5V
17
PAD
11,39,42,51,52,56,57,58,59,60,64
VIN
24,25,27,28,29,53,61,63
1V8_AON
2,11,29,41,42,44,46,49,50,51,54,56,57
3.3V
H/W SW
5,27,30,31,33,36,38,39,42,47,48,49,51,52,53,54,56,57,63,64
VDD3
GND
*0402_short
H/W SW
*0402_short
GPIO28_OC_WARN#
27
POWER RAIL
State in GC6
H/W SW
1V8_AON
ON
OFF
1V8_MAIN
PEX&1.05V
OFF
NVVDD
OFF
NVVDDS
OFF
FBVDD/Q
ON
POWER OFF SEQUENCE
I2CC_SCL
27,55
I2CC_SCL
I2CC_SDA
27,55
I2CC_SDA
GPU_GND_SENSE
28,61
GPU_GND_SENSE
GPU_NVVDD_SENSE
28,61
GPU_NVVDD_SENSE
FBVDDQ_SENSE
28,63
FBVDDQ_SENSE
FBVDDQ_SENSE_RTN
28,63
FBVDDQ_SENSE_RTN
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[55] PEX_VDD
[55] PEX_VDD
[55] PEX_VDD
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P95E0-D02A
6-71-P95E0-D02A
6-71-P95E0-D02A
Custom
Custom
Custom
P950ER
P950ER
P950ER
Date:
Date:
Date:
Monday, February 12, 2018
Monday, February 12, 2018
Monday, February 12, 2018
Sheet
Sheet
Sheet
55
55
55
6
7
8
A
B
C
D
R e v
R e v
R e v
D02A
D02A
D02A
o f
o f
o f
72
72
72
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