Counter Timing Engine - National Instruments X Series User Manual

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Chapter 7
Counters

Counter Timing Engine

Unlike analog input, analog output, digital input, and digital output, X Series counters do not
have the ability to divide down a timebase to produce an internal counter sample clock. For
sample clocked operations, an external signal must be provided to supply a clock source. The
source can be any of the following signals:
AI Sample Clock
AI Start Trigger
AI Reference Trigger
AO Sample Clock
DI Sample Clock
DI Start Trigger
DO Sample Clock
CTR n Internal Output
Freq Out
PFI <0..15>
PXI_Trig <0..7>
PXIe_DSTAR<A,B>
Change Detection Event
Analog Comparison Event
Not all timed counter operations require a sample clock. For example, a simple buffered pulse
width measurement latches in data on each edge of a pulse. For this measurement, the measured
signal determines when data is latched in. These operations are referred to as implicit timed
operations. However, many of the same measurements can be clocked at an interval with a
sample clock. These are referred to as sample clocked operations. Table 7-1 shows the different
options for the different measurements.
Note
All hardware-timed single point (HWTSP) operations are sample clocked.
Measurement
Buffered Edge Count
Buffered Pulse Width
Buffered Pulse
Buffered Semi-Period
7-2 | ni.com
Table 7-1. Counter Timing Measurements
Implicit Timing
Support
No
Yes
Yes
Yes
Sample Clocked
Timing Support
Yes
Yes
Yes
No

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