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24
Table 24 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 20pin selection (U1)
Port
Function
RSTX
FTEST
−
MOD
−
X0
−
X1
−
Vss
−
Vcc
PG0
(Cpin)
P14
PPG0
P13
TRG0/ADTG
P12
UCK0/EC0
U1 No.
No.
Port
54
11
P11
60
12
P10
59
13
P07
58
14
P06
−
15
P05
−
16
P04
46
17
P03
104
18
P02
103
19
P01
102
20
P00
Function
U1 No.
UO0
101
UI0
100
INT07/AN07
137
INT06/AN06/TO01
136
INT05/AN05/TO00
135
INT04/AN04/SIN
134
INT03/AN03/SOT
133
INT02/AN02/SCK
132
INT01/AN01/PPG01
131
INT00/AN00/PPG00
130
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