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Through evaluation MCU all hole for a terminal check (U1)
Table 13 Pin assignment of through evaluation MCU all hole for terminal check (continued)
Connector
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
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The pin assignment of a through evaluation MCU all hole for a terminal check is shown in Table 13.
Evaluation
Connector
MCU
Signal name
Pin No.
Number
C3
Vcc51
B2
LVCC
D3
LVDOUT
C2
LVDENX2
B1
LVDIN
E3
LVR0
E4
LVR1
D2
LVR2
E2
LVR3
C1
LVR4
F3
LVDBGR
F4
LVDREXT
F2
LVDENX
D1
BGOENX
E1
LVSS
G3
NC1
G4
P20A
G2
P21A
F1
P22A
G1
P23A
H4
P24A
H3
P25A
H2
P26A
H1
P27A
J2
P23B
J4
P24B
J3
P50
J1
P51
K1
P52
K4
P53
K3
P54
K2
P55
L1
P70
M1
P71
L4
P72
L3
P73
L2
P74
N1
P75
M2
P76
M4
P77
Evaluation
Pin
MCU
Signal name
Pin No.
41
M3
P80
42
P1
P81
43
N2
P82
44
R1
P83
45
N4
P84
46
N3
PG0
47
P2
ROMS0
48
T1
ROMS1
49
R2
BRSTX
50
P4
BDBMX
51
P3
BSOUT
52
U1
BEXCK
53
T2
BSIN
54
R4
RSTX
55
R3
X0A
56
V1
X1A
57
A1
Vss_1
58
U2
X1
59
T4
X0
60
U3
MOD
61
V2
Vcc53
62
T5
PF0
63
R5
PF1
64
U4
PF2
65
U5
NC2
66
V3
PINT0
67
T6
PINT1
68
R6
APBENX
69
U6
PCLK
70
V4
PSEL_EXT
71
V5
PENABLE
72
T7
PLOCK
73
R7
PACTIVE
74
U7
PWRITE
75
V6
PADDR0
76
V7
PADDR1
77
R8
PADDR2
78
T8
PADDR3
79
U8
PADDR4
80
V8
PADDR5
Connector
Evaluation
Pin
MCU
Signal name
Number
Pin No.
81
U9
PADDR6
82
R9
PADDR7
83
T9
PRDATA0
84
V9
PRDATA1
85
V10
PRDATA2
86
R10
PRDATA3
87
T10
PRDATA4
88
U10
PRDATA5
89
V11
PRDATA6
90
V12
PRDATA7
91
R11
PWDATA0
92
T11
PWDATA1
93
U11
PWDATA2
94
V13
PWDATA3
95
U12
PWDATA4
96
R12
PWDATA5
97
T12
PWDATA6
98
V14
PWDATA7
99
U13
NC3
100
V15
P10
101
R13
P11
102
T13
P12
103
U14
P13
104
V16
P14
105
U15
P15
106
R14
P16
107
T14
DA1
108
V17
DA0
109
U16
AVR3
110
R15
AVcc3
111
T15
AVR
112
V18
AVcc
113
T16
AVss
114
U17
P30
115
R16
P31
116
T17
P32
117
U18
P33
118
P16
P34
119
P15
P35
120
R17
P36
13
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