Quadrature-Clock And Direction Decoding - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Quadrature Decoder Unit (QDU)
QA
QB
QCLK
QDIR
QPOSCNT +1 +1
QA
QB
QCLK
QDIR
QPOSCNT −1 −1 −1 −1 −1 −1
Phase Error Flag— In normal operating conditions, quadrature inputs QEPA and QEPB will be 90
degrees out of phase. The phase error flag (PHE) is set in the QFLG register when edge transition
is detected simultaneously on the QEPA and QEPB signals to optionally generate interrupts. State
transitions marked by dashed lines in
Count Multiplication— The eQEP position counter provides 4x times the resolution of an input clock by
generating a quadrature-clock (QCLK) on the rising/falling edges of both eQEP input clocks (QEPA
and QEPB) as shown in
Reverse Count— In normal quadrature count operation, QEPA input is fed to the QA input of the
quadrature decoder and the QEPB input is fed to the QB input of the quadrature decoder. Reverse
counting is enabled by setting the SWAP bit in the QDECCTL register. This will swap the input to
the quadrature decoder thereby reversing the counting direction.
9.3.1.2 Direction-count Mode
Some position encoders provide direction and clock outputs, instead of quadrature outputs. In such cases,
direction-count mode can be used. QEPA input will provide the clock for position counter and the QEPB
input will have the direction information. The position counter is incremented on every rising edge of a
QEPA input when the direction input is high and decremented when the direction input is low.
9.3.1.3 Up-Count Mode
The counter direction signal is hard-wired for up count and the position counter is used to measure the
frequency of the QEPA input. Clearing the QDECCTL[XCR] bit enables clock generation to the position
counter on both edges of the QEPA input, thereby increasing the measurement resolution by 2x factor. In
up-count mode, it is recommended that the application not configure QEPB as a GPIO mux option, or
ensure that a signal edge is not generated on the QEPB input.
828
C28 Enhanced QEP (eQEP) Module
Figure 9-7. Quadrature-clock and Direction Decoding
+1 +1 +1 +1 +1 −1 −1
−1 +1 +1 +1 +1 +1 +1
Figure 9-6
Figure 9-7 .
Copyright © 2012–2019, Texas Instruments Incorporated
−1 −1 −1 −1 −1 −1 −1 −1
+1 +1 +1 +1
are invalid transitions that generate a phase error.
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
−1 +1 +1 +1
+1 −1 −1 −1
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