Texas Instruments LaunchPad AM243 Series User Manual page 61

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4.5 Clock
All reference clocks required for the SoC and two Ethernet PHY's are generated from a single three-output clock
buffer (LMK1C1103PWR), which is sourced from a single 25 MHz LVCMOS Oscillator. A single output clock
buffer (SN74LV1TT34DCKR) is used to level translate from 3.3 V to 1.8 V. An optional clock is provided to
RGMII2 Ethernet PHY by the OBSCLK0 output of the SoC by mounting R240 and R185 while isolating R244
and R13.
The reference clock required for XDS110 is generated locally using a 16 MHz crystal.
SI #
1
2
3
4
5
The 16 MHz clock will only become active after power is supplied to the micro-B USB connector after
insertion of a cable into the micro-B USB port.
SPRUJ12B – AUGUST 2021 – REVISED OCTOBER 2022
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Figure 4-6. Clock Architecture
Table 4-11. Clock Frequency Table
Signal Name
SOC_CLKIN
SOC_CLKIN_BUFF
PRG1_CPSW_RGMII1_CLK
PRG1_CPSW_RGMII2_CLK
OSC0
Note
Copyright © 2022 Texas Instruments Incorporated
Reference Expected Frequency
U11.4
R46
R25
R50
Y1.3
AM243x LaunchPad™ Development Kit User's Guide
Hardware Description
25.000 MHz
25.000 MHz
25.000 MHz
25.000 MHz
16.000 MHz
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