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Connector Pinout
J1.1
J3.21
J1.2
J3.22
J1.3
J3.23
J1.4
J3.24
J1.5
J3.25
J1.6
J3.26
J1.7
J3.27
J1.8
J3.28
J1.9
J3.29
J1.10
J3.30
SPRUJ12B – AUGUST 2021 – REVISED OCTOBER 2022
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Table 4-3. Net Name in Schematic and Package Signal Name for J1/J3 Connector
Net Name in Schematic
VSYS_3V3
VSYS_5V0
BP_ADC0_AINN0
DGND
MAIN_UART2_RXD
BP_ADC0_AIN2
MAIN_UART2_TXD
BP_ADC0_AIN3
GPIO1_12
BP_ADC0_AIN4
BP_ADC0_AIN1
BP_ADC0_AIN5
SPI3_CLK
BP_ADC0_AIN6
GPIO1_18
BP_ADC0_AIN7
SOC_I2C1_SCL
SYNC2_OUT
SOC_I2C1_SDA
SYNC3_OUT
Copyright © 2022 Texas Instruments Incorporated
Hardware Description
Package Signal Name
ADC_AIN0
GPMC0_AD0
ADC0_AIN2
GPMC0_AD1
ADC0_AIN3
PRG0_PRU0_GPO12
ADC0_AIN4
ADC0_AIN1
ADC0_AIN5
PRG0_PRU-_GPO16
ADC0_AIN6
PRG0_PRU0_GPO18
ADC0_AIN7
I2C1_SCL
MCAN0_TX
I2C1_SDA
MCAN0_RX
AM243x LaunchPad™ Development Kit User's Guide
51
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