Texas Instruments LaunchPad AM243 Series User Manual page 17

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The various pinmux options in different modes for Booterpack Connector pins are given below. The default modes of the pins are shown in
and in bold in the tables below.
Connect
or
Pinout Mode0 Mode1
J1.1
J3.21
J1.2 ADC_AIN0
J3.22
J1.3 GPMC0_ADC0 FSI_RX2_CLK UART2_RXD
J3.23 ADC0_AIN2
J1.4 GPMC0_AD1 FSI_RX2_D0 UART2_TXD
J3.24 ADC0_AIN3
J1.5 PRG0_PRU0_GP PRG0_PRU0_GPI1 PRG0_RGMII1_TD1
O12 2
J3.25 ADC_AIN4
J1.6 ADC0_AIN1
J3.26 ADC0_AIN5
J1.7 PRG0_PRU0_GP PRG0_PRU0_GPI1 PRG0_RGMII1_TXC
O16 6
J3.27 ADC0_AIN6
J1.8 PRG0_PRU0_GP PRG0_PRU0_GPI1 PRG0_IEP0_EDC_LATCH
O18 8 _IN0
J3.28 ADC0_AIN7
J1.9 I2C1_SCL CPTS0_HW1TSPU TIMER_IO0
SH
J3.29 MCAN0_TX UART4_RXD TIMER_IO2
J1.10 I2C1_SDA CPTS0_HW2TSPU TIMER_IO1
SH
J3.30 MCAN0_RX UART4_TXD TIMER_IO3
SPRUJ12B – AUGUST 2021 – REVISED OCTOBER 2022
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Table 4-2. Pinmux Options for J1/J3 Connector - Site 1
Mode2 Mode3 Mode4
EHRPWM0_SYNC
I
EHRPWM0_SYNC
0
PRG0_PWM0_A0
PRG0_PWM0_A2
PRG0_PWM0_TZ CPTS0_HW1TSPU
_IN SH
SPI2_CS1
SYNC2_OUT
SPI2_CS2
SYNC3_OUT
Copyright © 2022 Texas Instruments Incorporated
Mode5 Mode6
TRC_CLK
TRC_CTL
SPI3_CLK
CP_GEMAC_CPTS0_HW1TSP HRPWM8_A
USH
DDR0_IO_PLL_TESTOUT0P DDR0_IO_PLL_TESTOUT1P
SPI4_CS1
DDR0_IO_PLL_REFCLK_TES DDR0_IO_PLL_REFCLK_TES
T0P T1P
SPI4_CS2
AM243x LaunchPad™ Development Kit User's Guide
Hardware Description
Figure 4-2
Mode7 Mode8 Mode9 Mode10
GPIO1_8
0
GPIO0_1
5
GPIO1_8
2
GPIO0_1 PRG0_PWM2_TZ_O
6 UT
GPIO1_8
3
GPIO1_1 GPMC0_A14
2
GPIO1_8
4
GPIO1_8
1
GPIO1_8
5
GPIO1_1 GPMC0_A4
6
GPIO1_8
6
GPIO1_1 UART4_CT GPMC0_A5 UART2_RX
8 Sn D
GPIO1_8
7
GPIO1_6
6
GPIO1_6 EQEP2_I UART0_DTRn
0
GPIO1_6
7
GPIO1_6 EQEP2_S UART0_RIn
1
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