Table of Contents
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H
G
BLOCK DIAGRAM (MR816CSX/MR816X)
+48A ON/OFF(1)
+48A
Hi-Z ON/OFF
SW601
Hi-Z
+15A
PAD ON/OFF(1)
IC601
8
(8P)
7
5
BA
GAIN
IC602 (8P)
IC604 (8P)
4
MIC/LINE/Hi-Z
+14dB to +58dB
+15A
+15A
-15A
(+10 dBu to -60 dBu)
PAD
8
8
2,3
2,5
1
1
HA
7
26dB
4
4
C20K
-15A
-15A
JK601
VR601
INSERT I/O 1
RY606
(+4 dBu)
JK602
+48A ON/OFF(2)
+48A
PAD ON/OFF(2)
GAIN
IC602 (8P) IC605 (8P)
MIC/LINE 2
+14dB to +58dB
+15A
+15A
8
(+10 dBu to -60 dBu)
PAD
8
5,6
7
2,5
1
HA
7
26dB
4
4
C20K
JK603
VR602
-15A
-15A
INSERT I/O 2
RY607
(+4 dBu)
JK602
+48A ON/OFF(3)
+48A
PAD ON/OFF(3)
GAIN
IC603 (8P) IC606 (8P)
MIC/LINE INPUT 3
+14dB to +58dB
+15A
+15A
8
8
(+10 dBu to -60 dBu)
PAD
2,5
2,3
1
1
HA
7
4
26dB
4
C20K
JK604
VR603
-15A
-15A
+48A ON/OFF(4)
+48A
PAD ON/OFF(4)
GAIN
IC603 (8P) IC607 (8P)
MIC/LINE INPUT 4
+14dB to +58dB
+15A
+15A
8
8
(+10 dBu to -60 dBu)
PAD
5,6
2,5
7
1
HA
7
26dB
4
4
C20K
VR604
-15A
-15A
JK605
+48A ON/OFF(5)
+48A
PAD ON/OFF(5)
GAIN
IC650 (8P) IC652 (8P)
MIC/LINE INPUT 5
+14dB to +58dB
+15A
+15A
8
8
(+10 dBu to -60 dBu)
PAD
2,3
1
2,5
HA
1
7
26dB
4
4
C20K
JK901
VR901
-15A
-15A
+48A ON/OFF(6)
+48A
PAD ON/OFF(6)
GAIN
IC650 (8P) IC653 (8P)
MIC/LINE INPUT 6
+14dB to +58dB
+15A
+15A
PAD
8
8
(+10 dBu to -60 dBu)
5,6
2,5
7
1
HA
7
26dB
4
4
C20K
-15A
JK902
VR902
-15A
+48A ON/OFF(7)
+48A
PAD ON/OFF(7)
GAIN
IC651 (8P) IC654 (8P)
MIC/LINE INPUT 7
+14dB to +58dB
+15A
+15A
8
8
(+10 dBu to -60 dBu)
PAD
2,3
1
2,5
1
HA
7
4
26dB
4
C20K
JK903
VR903
-15A
-15A
+48A ON/OFF(8)
+48A
PAD ON/OFF(8)
GAIN
IC651 (8P) IC655 (8P)
MIC/LINE INPUT 8
+14dB to +58dB
+15A
+15A
8
8
(+10 dBu to -60 dBu)
PAD
5,6
2,5
7
1
HA
7
26dB
4
4
C20K
JK904
VR904
-15A
-15A
28CA1-2001038601-1
F
E
*
2 IC123: 1,2,36,38,97-100
*
3 IC131: 11,27,34,73,79,86,123,131,138,177,183,190
+48A ON/OFF (1:8)
*
4 IC131: 4,12,20,21,29,30,33,43,61,83,97,104,114,129,147,165,172-174,196,201
PAD ON/OFF (1:8)
*
5 IC132: 11,27,34,73,79,86,123,131,138,177,183,190
*
6 IC132: 4,12,20,21,23,29,30,33,43,61,83,97,104,114,129,147,165,196,-198,201,203,206
IC140
IC138
+3.3D
(6P)
IC137
(14P)
(5P)
+3.3D
RESET
Voltage
/RES
Regulator
Detector
*Detection Voltage: +1.65V
+1.8D
IC134
+3.3D
+3.3D
/RES
(44P)
FLASH
SRAM
IC133
IC706
+5A
+3.3D
(48P)
(16Mbit)
(4Mbit)
(8P)
+15A
1,23,
7,19
CS[2],
28
CS[0],
MMD[0:15]
LBN,UBN,
2
8
/RD,/WR,
16
1
IC709
16
/RD,/WR,
4
6
MMA[1:19]
MMD[0:15]
5
(28P)
MMA[1:17]
7
4
A/D
CS62WRN,
-15A
8
CS63WRN,MMA[1]
18.450MHz
AK5385
MCK(256Fs)
8
70-72
17
PAD ON/OFF(1:8)
*
2
BCK(64Fs)
14
+48A ON/OFF(1:8) 8
+15A
WCK(Fs)
20-25,35,37
13
AVC-CSN,SCLK,DATAI
AD-DATA[1]
IC123
2
8
3-5
+1.8D
15
(Core)
Memory-I/F
1
DA4382-CSN,DA-CCLK,
(100P)
*
3
25
ARM7
6
24
AD-/RESET
DA4358-CSN,DA-CDTI
7
+3.3D
(I/O)
10
26-29
GPIO
4
*
4
FS-H/L
73.728MHz
IC131
18
256Fs
*FPGA-3/4
10
/RES
(208P)
-15A
EN[1:4]
CSN
47-50
186
IC705
/PN_IC
182
SSP1
(8P)
PN_TXD,RXD
UART[1]
+5A
+3.3D
205,206
(MAIN)
UART[0]
1
IC708
6
SCK
CPU & DSP
(8P)
EEPROM
187
1,23,
7,19
5
SI
28
188
+15A
(2Kbit)
2
SO
171
IC710
2
IC146 (8P)
8
SDI
(28P)
1
4
2
Fs-H/L,AD-/RESET
6
5
7
4
A/D
256Fs,64Fs,Fs
AK5385
-15A
MCK(256Fs)
17
BCK(64Fs)
+15A
4
AD-DATA[1:4]
14
WCK(Fs)
2
8
13
AD-DATA[2]
1
25
15
6
24
7
4
AD-/RESET
10
FS-H/L
-15A
18
IC707
(8P)
4
3
+5LD
X550
6,7
8MHz
PN_TXD,RXD
8,9
15,36
CPU
Ceramic
/PN_IC
MN101C027YB
21
2
SW[1:2]
1,64
IC150
8
(64P)
LED Souce
LD[1:8]
53-60
Driver
16-20,22-24
TR550–557
8
LED Sink
D[1:8]
Driver
TA550
4
EN[1:4]
+5A
+3.3D
IC701
(8P)
1,23,
7,19
28
+15A
IC704
2
8
1
(28P)
4
6
5
7
PN
4
A/D
AK5385
-15A
MCK(256Fs)
+15A
17
BCK(64Fs)
14
WCK(Fs)
2
8
13
1
25
AD-DATA[3]
15
Encoder
6
24
7
x 2
4
AD-/RESET
10
EC101,
-15A
FS-H/L
18
EC201
IC700
(8P)
IC703
+5A +3.3D
(8P)
+15A
1,23,
7,19
28
8
2
1
IC712
4
5
(28P)
6
7
4
A/D
-15A
AK5385
+15A
MCK(256Fs)
17
BCK(64Fs)
8
2
14
1
25
WCK(Fs)
24
13
6
7
AD-DATA[4]
4
15
-15A
AD-/RESET
10
IC702
FS-H/L
18
(8P)
AC
FUSE
LF
F101,
F102
AC-IN
AC-Adaptor
PA-30 (AC36V/1.4A)
D
*
7
IC132: 95,100,101,103,125-128,132-137,139-141,143,152,153,155
*
8
IC113: 1-8,16-25,26,48
*
9
IC112: 1,7,13,25,38,44
*
10 IC112: 18,20-24,27-32
*
11 IC111: 3,10,12,21,32,41,52,61,72
*
12 IC123: 18,31,46,59,80,95
*
13 IC123: 9,33,44,82,93
MMA[1],MCI-/CS
MMD[0:15]
*FPGA-2/4
IRQ MASK/Status
MCI-/SIRQ
74
Register
DICE-/IRQ
75
/RES
IC123
/RESET
(100P)
73
/RESET(D)
68,72
CS[4],/RD,
MMD[0:15]
MMD[0:7]
/WR,MMA[1]
8
MMA[1]
16
Address,DataBus
CS60RDN
CS[0,2:4],LBN,UBN,
16
CS[3],/RD,/WR,
MMD[0:15]
/RD,/WR,MMA[1:19],
MMA[1:14]
MMD[0:15]
CS60RDN,
16
CS62WRN,CS63WRN
156-163,166-174
+1.8 D
(Core)
Ext.CPU-I/F
MIRQ
*
5
22
IC135
+3.3 D
(54P)
(I /O)
IC132
*
6
(208P)
/RES
SMD[0:15]
Memory-I/F
DataReadRequest
Port
SSP1
MLAN-ACTIVE
SDRAM
/RAS,/CAS,
162
MLAN-/RESET
CLK,WE,BANK,
185
(SUB)
(64Mbit)
MLAN-/RESET(D)
LDQM,UDQM,
184
DSP ONLY
/CS,CKE
*
7
20-26,29-35
SMA[1:14]
Audio I/O
Audio I/O
A-Bus
84
84
Mute
SDO
SDI
Mute
SDO
92
92
128Fs,Fs
128Fs,Fs
256Fs,128Fs,64Fs,Fs
AUDIO IN(24ch)/OUT(24ch)
DA-DATA[1:6]
MUTE-ON
2
DA-/RESET,DA-MUTE
DA-MUTE
*FPGA-4/4
76
DAC_SMUTE
40
Muting Control
MUTE-OFF
IC123 (100P)
Mode Control for DAC(DA4382-CSN,DA4358-CSN,DA-CCLK,DA-CDTI)
Analog Volume Control(AVC-CSN,SCLK,DATAI)
DM
CN111,
CN112
(30P)
CN101,
CN102
(30P)
LED Matrix
SW Matrix
8 x 8
8 x 2
LD011–018,
SW011–018,
LD021–028,
SW043, SW044
LD031–038,
LD043–047
LD048 (MR816CSX only)
IC852 (8P)
LD051–058
DC/DC
LD101–111
Convertor
LD201–211
IC850 (7P)
IC855 (5P)
DC/DC
+15A
Convertor
Regulator
IC608 (5P)
+12A
CTL
Regulator
TR850, TR851
+12A
Regulator
IC851 (5P)
IC853 (3P)
IC656 (5P)
DC/DC
-15A
Convertor
Regulator
IC854 (3P)
Rectifier
-5V
Regulator
IC856 (5P)
IC858 (3P)
DC/DC
+5V
Convertor
Regulator
Rectifier
+5V
ON/
Regulator
IC859 (3P)
STANDBY
IC857 (5P)
DC/DC
Convertor
C
B
MR816CSX/MR816X
Address,Data Bus
*
1 IC101: 22,25,26,30,31,42,51,52,56,61,62
+3.3D
/RESET
FLASH
12
37,47
A[0:18],CS[0]
(8Mbit)
*
8
/RD,/WR
11,28
A[0:18],CS[0,1,5]
IC113 (48P)
D[0:15]
16
/RD,/WR
/RAS,/CAS,
IC110 (5P)
CLK,WE,BANK,
+3.3D
IC102 (8P)
SDRAM
+3.3D
DQM[0:1]
(16Mbit)
EEPROM
*
9
A[0:10],CS[1]
Regulator
(32Kbit)
*
10
16
D[0:15]
5,6
IC112 (50P)
/RESET(D)
+3.3D
+3.3D(I/O)
+1.8D(Core)
I
2
C
A[0],CS[5]
*
11
17,20
A4,C5
56,59
MCI
/RD,/WR
P19,N20,L19
18,19
16
A9
D[0:15]
+3.3D
IC111
D[0:15]
ARM7
(80P)
16
16
/SIRQ
55
49.152MHz
49.152MHz
53
*
1
8 42
51,53 16
/MIRQ
PHY
PHY-LINK
INT[0]
V3
I/F
(TSB41AB2)
16MHz
DataReadRequest
D5
LINK
IC101 (64P)
Audio
INT[1]
Layer
GPIO
ACTIVE
Core
C4
IC103
MUTE-ON
(272P)
MIDI
25MHz
DICEⅡ
PLL
UART[0]
SYT
UART
50MHz
V11
WCLK IN
MUTE-OFF
LATCH
Digital
WCLK OUT
PLL
Audio
MUTE
Router
U11
OUTPUT 16ch
Analog
L. P. F
PLL
INPUT 16ch
I2S
/RESET
256Fs,128Fs
/RESET(D)
64Fs,Fs
Audio IN/OUT
MUTE
GPIO
A20,
E17
+3.3D
MUTE
E20,
+1.5D
G17,
DSAI
*
12
W15
Y14
F18
13
2
*
Y19,
W16
W14
OUTPUT 8ch
V18
IC123
2
INPUT 8ch
(100P)
ch/Line
Fs,256Fs
INPUT 8ch
Convert
10,92
*FPGA-1/4
16,17
5,6
256Fs,64Fs,Fs
CONFIG
IC124
(8P)
(FLASH)
OUTPUT 8ch
6
+3.3D
INPUT 2ch
Regulator
+1.5D
OUTPUT 2ch
IC125
(6P)
+5A
7,11,34,35
+15A
+15A
TR752,
IC752
IC757
TR753
2
(8P)
47
(8P)
1
8
8
MUTE
7
3
1
3,6
48
MUTE
2
43
1
1
3,6
MUTE
4
4 7
3
44
IC753
IC759
MUTE
(8P)
(8P)
TR756,
IC751
-15A
-15A
TR757
(48P)
+15A
+15A
TR760,
IC754
IC761
TR761
2
(8P)
(8P)
39
1
8
8
MUTE
7
3
1
3,6
40
MUTE
2
32
1
1
3,6
MUTE
4 7
3
4
MCK(256Fs)
33
IC755
IC763
MUTE
10
BCK(64Fs)
(8P)
(8P)
TR764,
9
-15A
-15A
TR765
WCK(Fs)
17
DA-DATA[1-4]
13-16
DA-/RESET
8
IC752 (8P)
CSN-4358
IC756
21
+15A
CCLK
+15A
TR750,
(8P)
19
TR751
CDTI
5
2
20
1
8
8
MUTE
7
6
7
3,6
1
MUTE
5
46
1
3,6
7
MUTE
4 7
6
4
45
IC758
MUTE
(8P)
TR754,
-15A
-15A
TR755
D/A
IC753 (8P)
AK4358A
IC754 (8P)
IC760
+15A
+15A
TR758,
(8P)
TR759
5
42
1
MUTE
8
8
7
6
7
3,6
41
MUTE
5
38
1
MUTE
7
3,6
4 7
6
4
37
IC762
MUTE
(8P)
TR762,
-15A
-15A
TR763
IC755 (8P)
±5A
+48A
1,2,10,11,37,38,39,48
CSN
40
SCLK
42
+5A
IC817
+15A
DATAI
41
(8P)
+15A
13,14
MCK(256Fs)
+12A-1
+15A
1
11
2
BCK(64Fs)
3
TR802
2
8
1
3
34
WCK(Fs)
3
8
1
12
MUTE
4
D/A
DA-DATA[5]
+12A-2
3
10
5
7
DA-/RESET
AK4382A
5
MUTE
7
4
5
5
32
4
CSN-4382
9
6
TR803
6
IC809
CCLK
-15A
7
IC814
-15A
(16P)
CDTI
-15A
8
(48P)
HP-Amp
IC811
-5A
(8P)
Analog
+5A
Volume
IC818
Control
(8P)
+15A
13,14
YAC523
+15A
+5A
MCK(256Fs)
1
11
2
BCK(64Fs)
3
TR804
8
1
2
7
30
WCK(Fs)
D/A
8
1
12
3
MUTE
4
+5D
DA-DATA[6]
10
5
3
7
5
MUTE
DA-/RESET
AK4382A
7
4
9
28
5
9
6
4
TR805
+5LD
CSN-4382
6
IC810
CCLK
-15A
7
(16P)
-15A
CDTI
+3.3D
8
IC812
HP-Amp
(8P)
MUTE
BLOCK DIAGRAM (MR816CSX/MR816X)
A
1
X101
CN101
24.576MHz
1
1
59,60
43-46
IEEE1394 (S400)
34-37
2
2
IEEE1394 (S400)
CN102
IC106
JK103
(16P)
IN
13
14
WCLK
2
10
9
OUT
12
IC107
(16P)
JK101
OPTICAL IN
1
4
OPTICAL OUT
2
IC155
JK102
(5P)
JK101
IC108 (14P)
4
S/PDIF IN
1
IC154 (5P)
1
S/PDIF OUT
4
3
2
JK102
JK750
OUTPUT 2
+4 dBu (BAL)
OUTPUT 4
+4 dBu (BAL)
JK751
JK752
OUTPUT 6
+4 dBu (BAL)
OUTPUT 8
+4 dBu (BAL)
JK753
JK
JK301
OUTPUT 1
+4 dBu (BAL)
OUTPUT 3
4
+4 dBu (BAL)
JK302
JK303
OUTPUT 5
+4 dBu (BAL)
OUTPUT 7
+4 dBu (BAL)
JK304
HP
JK201
1
5
JK202
2
3
6
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