Sony SX-M700 Service Manual page 69

LTC485CN8(LINEAR TECNOLOGY)
LTC487CN(LINEAR TECHNOLGY)
LTC490CS8(LINEAR TECHNOLOGY)
6-6
MB8422-12LP(FUJITSU)
**********
C-MOS 16K (2048 8)-BIT DUAL PORT STATIC RAM
X
-TOP VIEW-
V
DD
48
CSL IN 1
(+5V)
CSR IN
WEL 2 47
IN
BUSYL 46 WER IN
OUT 3
A1OL 45 BUSYR OUT
IN 4
44 A10R IN
OEL IN 5
43 OER IN
AOL IN 6
A0R IN
A1L 7 42
IN
A2L 41 A1R IN
IN 8
A3L 40 A2R IN
IN 9
39 A3R IN
A4L IN 10
38 A4R IN
A5L IN 11
A5R IN
A6L 12 37
IN
A7L 36 A6R IN
IN 13
A8L 35 A7R IN
IN 14
34 A8R IN
A9L IN 15
A9R IN
DOL 16 33
I/O
D7R
D1L 17 32 I/O
I/O
D2L 31 D6R I/O
I/O 18
30 D5R I/O
D3L I/O 19
29 D4R I/O
D4L I/O 20
D3R I/O
D5L 21 28
I/O
D2R
D6L 22 27 I/O
I/O
D7L 26 D1R I/O
I/O 23
25 D0R I/O
24 GND
LEFT PORT
; ADDRESS INPUTS
AOL–A10L
; BUSY OUTPUT
BUSYL
CSL ; CHIP SELECT INPUT
DOL–D7L ; DATA INPUTS/OUTPUTS
OEL ; OUTPUT ENABLE INPUT
; WRITE ENABLE INPUT
WEL
2
WEL
1
CSL
5
OEL
16
D0L
17
D1L
18
D2L
19
I/O
D3L
20
BUFFER
D4L
21
D5L
22
D6L
23
D7L
4
A10L
15
ROW
A9L
14
DECODER
A8L
13
A7L
12
A6L
11
A5L
10
A4L
COLUMN
9
A3L
DECODER
8
A2L
7
A1L
6
A0L
10
ARBITRATION INTERRUPT CIRCUIT
3
BUSYL
MB8422–90LP (1/2)
IL00
1 5
2
WEL CSL OEL
16
6
A0L
D0L
7 17
A1L
D1L
8 18
A2L D2L
9 19
A3L
D3L
20
10
A4L
D4L
21
11
A5L
D5L
22
12
A6L
D6L
13 23
A7L
D7L
14
A8L
3
15
A9L
BUSYL
4
A10L
42
25
A0R
D0R
41
26
A1R
D1R
40 27
A2R
D2R
39 28
A3R D3R
38 29
A4R D4R
37 30
A5R
D5R
36
31
A6R
D6R
35
32
A7R
D7R
34
A8R
45
33
A9R BUSYR
44
A10R
WER CSR OER
43
46 47
RIGHT PORT
AOR–A10R ; ADDRESS INPUTS
BUSYR ; BUSY OUTPUT
; CHIP SELECT INPUT
CSR
; DATA INPUTS/OUTPUTS
DOR–D7R
; OUTPUT ENABLE INPUT
OER
WER ; WRITE ENABLE INPUT
MB8422–90LP (2/2)
I/O
BUFFER
ROW
DECODER
2048 8BIT
X
COLUMN
MEMORY
DECODER
ARRAY
10
SX-M700
46
WER
47
CSR
43
OER
25
D0R
26
D1R
27
D2R
28
D3R
29
D4R
30
D5R
31
D6R
32
D7R
44
A10R
33
A9R
34
A8R
35
A7R
36
A6R
37
A5R
38
A4R
39
A3R
40
A2R
41
A1R
42
A0R
45
BUSYR