Compaq Deskpro EP 6233 Technical Reference Manual page 72

Chapter 4 System Support
The RAM refresh is designed to perform a memory read cycle on each of the 512 row addresses
in the DRAM memory space. Refresh operations are used to refresh memory on the 32-bit
memory bus and the ISA bus. The refresh address is provided on lines SA00 through SA08.
Address lines LA23..17, SA18,19 are driven low.
The remaining address lines are in an undefined state during the refresh cycle. The refresh
operations are driven by a 69.799-KHz clock generated by Interval Timer 1, Counter 1. The
refresh rate is 128 refresh cycles in 2.038 ms.
4.4.3.2 DMA Controller Registers
Table 4-12 lists the DMA Controller Registers and their I/O port addresses. Note that there is a
set of registers for each DMA controller.
Table 4–12. DMA Controller Registers
Register
Status
Command
Mode
Write Single Mask Bit
Write All Mask Bits
Software DRQx Request
Base and Current Address - Ch 0
Current Address - Ch 0
Base and Current Word Count - Ch 0
Current Word Count - Ch 0
Base and Current Address - Ch 1
Current Address - Ch 1
Base and Current Word Count - Ch 1
Current Word Count - Ch 1
Base and Current Address - Ch 2
Current Address - Ch 2
Base and Current Word Count - Ch 2
Current Word Count - Ch 2
Base and Current Address - Ch 3
Current Address - Ch 3
Base and Current Word Count - Ch 3
Current Word Count - Ch 3
Temporary (Command)
Reset Pointer Flip-Flop (Command)
Master Reset (Command)
Reset Mask Register (Command)
NOTE:
For a detailed description of the DMA registers, refer to the Compaq EISA Technical Reference Guide .
4-22 Compaq Deskpro EP Series of Personal Computers
Table 4-12.
DMA Controller Registers
Controller 1
First Edition - April 1998
Controller 2
008h 0D0h
008h 0D0h
00Bh 0D6h
00Ah 0D4h
00Fh 0DEh
009h 0D2h
000h 0C0h
000h 0C0h
001h 0C2h
001h 0C2h
002h 0C4h
002h 0C4h
003h 0C6h
003h 0C6h
004h 0C8h
004h 0C8h
005h 0CAh
005h 0CAh
006h 0CCh
006h 0CCh
007h 0CEh
007h 0CEh
00Dh 0DAh
00Ch 0D8h
00Dh 0DAh
00Eh 0DCh
R/W
R
W
W
W
W
W
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
R
W
W
W