Compaq Deskpro EP 6233 Technical Reference Manual page 71

4.4.3.1 Page Registers
The DMA page register contains the eight most significant bits of the 24-bit address and works
in conjunction with the DMA controllers to define the complete (24-bit)address for the DMA
channels. Table 4-11 lists the page register port addresses.
Table 4–11. DMA Page Register Addresses
DMA Page Register Addresses
DMA Channel
Controller 1 (byte transfers)
Ch 0
Ch 1
Ch 2
Ch 3
Controller 2 (word transfers)
Ch 4
Ch 5
Ch 6
Ch 7
Refresh
NOTE:
The DMA memory page register for the refresh channel must be
programmed with 00h for proper operation.
The memory address is derived as follows:
24-Bit Address - Controller 1 (Byte Transfers)
8-Bit Page Register
A23..A16
24-Bit Address - Controller 2 (Word Transfers)
8-Bit Page Register
A23..A17
Note that address line A16 from the DMA memory page register is disabled when DMA
controller 2 is selected. Address line A00 is not connected to DMA controller 2 and is always 0
when word-length transfers are selected.
By not connecting A00, the following applies:
The size of the the block of data that can be moved or addressed is measured in 16-bits
(words) rather than 8-bits (bytes).
The words must always be addressed on an even boundary.
DMA controller 1 can move up to 64 Kbytes of data per DMA transfer. DMA controller 2 can
move up to 64 Kwords (128 Kbytes) of data per DMA transfer. Word DMA operations are only
possible between 16-bit memory and 16-bit peripherals.
Table 4-11.
Page Register I/O Port
087h
083h
081h
082h
n/a
08Bh
089h
08Ah
08Fh [see note]
8-Bit DMA Controller
A15..A00
16-Bit DMA Controller
A16..A01, (A00 = 0)
Compaq Deskpro EP Series of Personal Computers
First Edition–- April 1998
Technical Reference Guide
4-21