Compaq Deskpro EP 6233 Technical Reference Manual page 104

Chapter 5 Input/Output Interfaces
5.2.1.1 IDE Configuration Registers
The configuration registers of the IDE controller are integrated into the south bridge (82371EB)
component and configured as a PCI device with bus mastering capability. The PCI configuration
registers for the IDE controller function (PCI device #20, function #1) are listed in Table 5-1.
Table 5–1. IDE PCI Configuration Registers
PCI
Conf.
Addr. Register
00-01h Vender ID
02-03h Device ID
04-05h PCI Command
06-07h PCI Status
08h Revision ID
09h Programming
0Ah Sub-Class
0Bh Base Class Code
0Dh Master Latency Timer
0Eh Header Type
0F-1Fh Reserved
-- --
NOTE:
Assume unmarked gaps are reserved and/or not used.
Refer to VIA or Intel documentation for detailed description of registers.
5-2 Compaq Deskpro EP Series of Personal Computers
Table 5-1.
EIDE PCI Configuration Registers (82371, Function 1)
Value
Reset
8086h
7111h
0000h
0000h
First Edition – April 1998
PCI
on Conf.
Addr. Register
20-23h BMIDE Base Address
24-3Fh Reserved
40, 41h IDE Timing (Primary)
42, 43h IDE Timng (Secondary)
0Ah 44h Slave IDE Timing
01h 45-47h Reserved
01h 48h Ultra ATA Control
80h 49h Reserved
00h 4A, 4Bh Ultra ATA Timing
80h 4C-F7h Reserved
F8-FBh Manufacture's ID
-- FC-FFh Reserved
Value
on
Reset
1
00h
00h
00h
00h
00h