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EN 6
2.
TPM9.2HE LA
15 - DDC_SCL
6 - Audio - In: Left / Right, VGA
Bu - Audio L/R in
7 - HDMI: Digital Video - In, Digital Audio with ARC - In/Out
19
18
10000_017_090121.eps
Figure 2-11 HDMI (type A) connector
1
- D2+
2
- Shield
3
- D2-
4
- D1+
5
- Shield
6
- D1-
7
- D0+
8
- Shield
9
- D0-
10 - CLK+
11 - Shield
12 - CLK-
13 - Easylink/CEC
14 - n.c.
2.5
Chassis Overview
Refer to
9. Block Diagrams
2013-May-30
Technical Specs, Diversity, and Connections
DDC clock
0.5 V
/ 10 k
RMS
1
2
090428
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Control channel
for PWB/CBA locations.
j
15 - DDC_SCL
16 - DDC_SDA
17 - Ground
jq
18 - +5V
19 - HPD
20 - Ground
8 - Cinch: Video YPbPr - In, Audio - In
Gn - Video - Y
Bu - Video - Pb
Rd - Video - Pr
Wh - Audio - L
Rd - Audio - R
j
H
9 - Service / UART
j
1
- UART_TX
j
2
- Ground
H
3
- UART_RX
j
j
10 - Cinch: Digital Audio - Out
H
BK - Coaxial
j
j
11 - Cinch: Video CVBS - Out, Audio - Out
H
Rd - Audio R
j
Wh - Audio L
jk
back to
div. table
DDC clock
DDC data
Gnd
Hot Plug Detect
Gnd
1 V
/ 75 W
PP
/ 75
0.7 V
PP
/ 75
0.7 V
PP
0.5 V
/ 10 k
RMS
0.5 V
/ 10 k
RMS
Transmit
Gnd
Receive
/ 75
0.4 - 0.6V
PP
0.5 V
/ 10 k
RMS
0.5 V
/ 10 k
RMS
j
jk
H
j
j
H
jq
jq
jq
jq
jq
k
H
j
kq
kq
kq
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