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EN 50
8.
TPM9.2HE LA
8.9
Diagram
10-6-10 HDMI SW
Block diagram
Pinning information
2013-May-30
IC Data Sheets
B10, IT6633E-T (IC U501)
ARX[2,1,0,C]P
EQ
ARX[2,1,0,C]M
BRX[2,1,0,C]P
EQ
BRX[2,1,0,C]M
CRX[2,1,0,C]P
EQ
CRX[2,1,0,C]M
EQ
ASCL/ASDA
DDC I
BSCL/BSDA
CSCL/CSDA
AHPD
BHPD
CHPD
IT6633E-T Block
48
PWDB
49
BHPD
50
BSDA
51
BSCL
52
BRXCM
53
BRXCP
54
VCC
55
BRX0M
56
BRX0P
57
VSS
58
BRX1M
59
BRX1P
60
VCC
61
BRX2M
62
BRX2P
63
CHPD
64
1
Figure 8-11 Internal block diagram and pin configuration
3:1
MUX
Active port
indication
2
C Repeater/
Switch
HPD Control
Register Block
Control Logic
47
46
45
44
43
42
41
40
39
38
37
36
2
3
4
5
6
7
8
9
10
11
12
13
back to
div. table
Auto-
calibration
TX[2,1,0,C]P
DRV
TX[2,1,0,C]M
RX
Detect
TXSCL/TXSDA
TXHPD
EDID RAM
I2CSEL
S1, S2
and
PCSCL/PCSDA
35
34
33
32
S1/PCSCL
TXHPD
31
TXSDA
30
29
TXSCL
28
VSS
27
TXCM
TXCP
26
VCC
25
TX0M
24
TX0P
23
VSS
22
21
TX1M
20
TX1P
19
VCC
18
TX2M
TX2P
17
14
15
16
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