Kurzweil CUP2 Service Manual page 71

5
VCC33 VCC12
RN1 RN1
1 8 PB7_IN
2 7 PB6_IN
3 6 CPU_IRQ_1_L C1 C1 C2 C2 C3 C3
4 5 CPU_IRQ_0_L
10K 10K 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VCC33
RN2 RN2
1 8 FLASH_CS_L
2 7
VCC33 3 6 PB2_IN
RN3 RN3
4 5 SCAN_CS_L
1 8
CPU_WAIT_L 10K 10K CPU
2 7 IACK_L
3 6 M1_DACK_L
4 5 M1_DREQ_L
D
10K 10K
sh.5 CPU_NMI_L
VCC33
RN4 RN4
sh.4 USB_HOST_FLAG_L
1 8 PB2_IN
2 7
FLWP_L
CPU_IRQ_1_L
3 6 FLCS_L
sh.5 CPU_IRQ_0_L
4 5 EPROM_INST_L
10K 10K
sh.3,5 DSP_RESET_SEL_L
VCC33 WDT_OVRF_L
RN5 RN5
BOOT_RDY
1 8 DAC_CDTI FLRDY
2 7 DAC_CCLK FLWP_L
3 6 DAC_CSN FLCS_L
4 5
SPBLANK
10K 10K IACK_L
sh.2,5 M1_DACK_L
sh.2,5 M1_DREQ_L
VCC33 sh.3 SH_AVCC
L1 L1
SH_AVCC
+ + C29 C29
600 OHM @ 100MHz 600 OHM @ 100MHz C27 C27 R3 R3 1.0K 1.0K DA1
sh.3,4 BRITE
22uF 22uF 0.1uF 0.1uF R1 R1 1.0K 1.0K DA0
sh.3 SPANA_OUT1
MIDI / SCAN CONN
sh.3 SH_AN0
J31 J31
1 MIDI_TXD
MIDI_TXD
2 MIDI_RXD
C
MIDI_RXD
3 EPROM_INST_L
SCAN_TXD
4 SCAN_TXD
SCAN_RXD
5 SCAN_RXD
LCD_CONT
6
AES_OUT LCD_CONT sh.4
7
GND
8
M1_SDOUT_4 sh.2
NC
HEADER 8 HEADER 8
VCC33
R28 R28
sh.3 SPBLANK
R6 R6 R7 R7
sh.4 MUTE
1.0K 1.0K
1.0K 1.0K
sh.4 DAC_CSN
1.0K 1.0K
sh.4 DAC_CCLK
D1 D1 D2 D2
sh.4 DAC_CDTI
AP3216SURCK AP3216SURCK AP3216SURCK AP3216SURCK
sh.4 DAC_PDN
DOTCLK
sh.4 LCD_CP
sh.4 LCD_M_DISP
R8 R8 LCD VSYNC
sh.4 LCD_FLM
LCD_CLK_IN
sh.4 LCD_VCC_PWC
DNS DNS J2 J2 VCC33 10K 10K
sh.4 LCD_VEE_PWC
2 1 LCD HSYNC
sh.4 LCD_LP
4 3
sh.4 LCD_DISP_OFF_L
6 5
R9 R9 R10 R10 R29 R29 R30 R30
10K 10K 10K 10K 10K 10K 10K 10K
HEADER 3X2 HEADER 3X2
LED_1
DNS DNS VCC33 LED_2
J16 J16 JMPR_1
1 JMPR_2
VCC33
B
2
/SDCS
3 SD_CS1_L
SDO
4 SD_SO1
SDI
5 SD_SI1
SCK
6
SD_SCK1
GND sh.4 LCD_D_[3:0]
VCC12 LCD_D_3
HEADER 6 HEADER 6 L2 L2 LCD_D_2
LCD_D_1
SPI I/F CONN LCD_D_0
C30 C30 + + C31 C31
600 OHM @ 100MHz 600 OHM @ 100MHz
22uF 22uF 0.1uF 0.1uF SH2A_PLLVCC
SH2A_EXTAL
X1 X1
R12 R12 330 330 SH2A_XTAL
C32 C32 16.6667MHz 16.6667MHz C33 C33 R14 R14
sh.3,5 SDRAM_CLK
22 22
33pF 33pF 33pF 33pF
sh.3,5 RESET_L
VCC33
RN10 RN10 VCC33
sh.4 USB_HOST_EN_L
1 8 LCD_CS_L
2 7 DSP_RESET_SEL_L
3 6 ASEMD0_L
4 5 CPU_NMI_L ASEBRKAK_L
4.7K 4.7K R16 R16
CPU_TCK
RN11 RN11 CPU_TMS
10K 10K
1 8
CPU_TDO CPU_TDI
2 7 CPU_TDI CPU_TDO
3 6 CPU_TMS CPU_TRST_L
A 4 5 ASEBRKAK_L
4.7K 4.7K
R17 R17
R18 R18 0 0 VCC33 1.0K 1.0K
DNS DNS
H-UDI PORT J4 J4 R19 R19
CPU_TCK 1 (1) (8) 2 0 0
CPU_TRST_L 3 (2) (9) 4 (GND)
5 6
CPU_TDO DNS DNS
ASEBRKAK_EM_L 7 8 J5 J5
CPU_TMS 9 10
CPU_TDI 11 12 1 Install jumper for Lauterbach debugger
RESET_L 13 (7) (14) 14 2
when in debug mode.
HEADER 7X2 HEADER 7X2
HEADER2 HEADER2
5
4
C4 C4 C5 C5 C6 C6 C7 C7 C8 C8 C9 C9 C10 C10 C11 C11 C12 C12
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VCC12 VCC33
U1 U1
57 interrupts interrupts address bus address bus
NMI
48 CPU_A_22
A22/PE3
182 47 CPU_A_21
PB3/IRQ3/SDA1 A21/PE2
181 46 CPU_A_20
PB2/IRQ2/SCL1 A20
180 45
SH7203 SH7203 CPU_A_19
PB1/IRQ1/SDA0 A19
179 44 CPU_A_18
PB0/IRQ0/SCL0 A18
42 CPU_A_17
A17
gpio gpio 40 CPU_A_16
A16
62 39 CPU_A_15
PE8/CE2A/IRQ4/SCK2 A15
122 38 CPU_A_14
PB12/IRQOUT/AUDCK A14
88 37 CPU_A_13
PB11/CTxD1 A13
87 36 CPU_A_12
PB10/CRxD1 A12
86 35 CPU_A_11
PB9/CTxD0 A11
85 33 CPU_A_10
PB8/CRxD0 A10
30
CPU_A_9
A9
upper addr / dma upper addr / dma 28 CPU_A_8
A8
71 27 CPU_A_7
PE10/IRQ6/TEND0 A7
66 26 CPU_A_6
A24/PE5/IRQ1/DACK0 A6
64 25 CPU_A_5
A23/PE4/IRQ0/DREQ0 A5
24 CPU_A_4
A4
116 adc adc 23 CPU_A_3
AVREF A3
114 22 CPU_A_2
AVCC A2
120 20 CPU_A_1
AVSS A1/PC1
17 CPU_A_0 CPU_A_0
A0/CS7/AUDSYNC
119
AN7/PA7/DA1
118 data bus data bus
AN6/PA6/DA0
117 192 CPU_D_31
AN5/PA5 D31/PD15/PINT7
115 193 CPU_D_30
AN4/PA4 D30/PD14/PINT6
113 194 CPU_D_29
AN3/PA3 D29/PD13/PINT5
112 195 CPU_D_28
AN2/PA3 D28/PD12/PINT4
111 197 CPU_D_27
AN1/PA1 D27/PD11/PINT3
110 199 CPU_D_26
AN0/PA0 D26/PD10/PINT2
200 CPU_D_25
D25/PD9/PINT1
uart uart 201 CPU_D_24
D24/PD8/PINT0
69 202
CPU_D_23
PE7/DACK1/TXD2 D23/PD7/IRQ7
68 203 CPU_D_22
A25/PE6/DREQ1/RXD2 D22/PD6/IRQ6
83 205 CPU_D_21
PE15/RTS3 D21/PD5/IRQ5
81 208 CPU_D_20
PE13/TXD3 D20/PD4/IRQ4
73 210 CPU_D_19
PE12/RXD3 D19/PD3/IRQ3
211 CPU_D_18
D18/PD2/IRQ2
78 rtc rtc 212 CPU_D_17
RTC_X1 D17/PD1/IRQ1
79 213 CPU_D_16
RTC_X2 D16/PD0/IRQ0
214 CPU_D_15
D15
132 audio clocks audio clocks 215 CPU_D_14
AUDIO_X2 D14
131 217 CPU_D_13
AUDIO_X1 D13
128 219 CPU_D_12
AUDIO_CLK D12
220 CPU_D_11
D11
dig audio dig audio 221 CPU_D_10
D10
124 222 CPU_D_9
PF29/SSID3 D9
125 223 CPU_D_8
PF28/SSIWS3 D8
126 225 CPU_D_7
PF27/SSISCK3 D7
134 228 CPU_D_6
PF26/SSID2 D6
135 230 CPU_D_5
PF25/SSIWS2 D5
136 231 CPU_D_4
PF24/SSISCK2 D4
232 CPU_D_3
D3
lcd cntrl /flash lcd cntrl /flash 233 CPU_D_2
D2
137 234 CPU_D_1
PF18/SSISCK0/LCD_CL2 D1
138 235 CPU_D_0
PF19/SSIWS0/LCD_M_DISP D0
139
PF20/SSID0/LCD_FLM
140 bus control bus control RN6 RN6
PF21/SSISCK1/LCD_CLK
142 239 1
PF22/SSIWS1/LCD_VCPWC CKE/PC12
145 2
PF23/SSID1/LCD_VEPWC
2 3
CASL/PC9
147 3 4
PF17/FCE/LCD_CL1 RASL/PC8
148
RN7 RN7 22 22
PF16/FRB/LCD_DON
149 5 1
PF15/NAF7/LCD_D15 WE3/DQMUU/AH/PC7
150 8 2
PF14/NAF6/LCD_D14 WE2/DQMUL/PC6
151 10 3
PF13/NAF5/LCD_D13 WE1/DQMLU/PC5
152 13 4
PF12/NAF4/LCD_D12 WE0/DQMLL/PC4
153 22 22
PF11/NAF3/LCD_D11
155 238
PF10/NAF2/LCD_D10 RD/WR/PC13
158 12 RN8 RN8
PF9/NAF1/LCD_D9 RD
160 1
PF8/NAF0/LCD_D8
72 2
CS6/PE11
161 70 3
PF7/FSC/LCD_D7 CS5/PE9
162 63 4
PF6/FOE/LCD_D6 CS4/PE1/MRES/TXD0
163 14 4
PF5/FCDE/LCD_D5 CS3/PC3
3
164 15
PF4/FWE/LCD_D4 CS2/PC2
165 82 2
PF3/LCD_D3 CS1/PE14/CTS3
166 11 1
PF2/LCD_D2 CS0
167 RN9 RN9
PF1/LCD_D1
169 75
PF0/LCD_D0 WAIT/PC14
49
BS/PE0/ADTRG
system clocks system clocks
60
PLLVCC
58 usb usb 101 USB_DP
PLLVSS DP
100 USB_DM
DM
56
EXTAL
55 102
XTAL VBUS
105 R13 R13
REFRIN
50
CKIO 5.62K 5.62K
93
USB_X1
90 system control system control 94
MD USB_X2
96
MD_CLK1
97 107
MD_CLK0 USBAPVCC
106
USBAPVSS
59
RES
99
USBDPVCC
240 98
PC11/BREQ/AUDATA1 USBDPVSS
1
PC10/BACK/AUDATA0
103
USBAVCC
debug/emu debug/emu 104
USBAVSS
61
ASEMD
175 108
ASEBRKAK/ASEBRK USBDVCC
109
USBDVSS
178
TCK
172 190 PB7_IN
TMS i2c i2c PB7/IRQ7/SDA3
174 189
PB6_IN
TDI PB6/IRQ6/SCL3
177 186
TDO PB5/IRQ5/SDA2
176 185
TRST PB4/IRQ4/SCL2
VCC33
4
3
CPU_A_[22:0]
CPU_D_[31:0]
SDRAM BYPASS CAPS
VCC33 VCC33
C13 C13 C14 C14 C15 C15 C16 C16 C17 C17 C18 C18 C19 C19 C20 C20
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VCC33
SDRAM
U2 U2
CPU_A_13 21
A11
CPU_A_12 24
A10
CPU_A_11 66
A9
CPU_A_10 65
A8
CPU_A_9 64
A7
CPU_A_8 63
A6
62
CPU_A_7
A5
CPU_A_6 61
A4
CPU_A_5 60
A3
CPU_A_4 27
A2
CPU_A_3 26
A1
CPU_A_2 25
A0
MT48LC4M32B2P-7F MT48LC4M32B2P-7F
CPU_A_15 23
BA1
CPU_A_14 22
BA0
59
DQM3
VCC33 28
DQM2
71
DQM1
16
DQM0
R25 R25 SDRAM_CAS_L 18
CAS
10K 10K
SDRAM_RAS_L 19
RAS
CPU_WR_L 17
WE
SDRAM_CS_L 20
CS
67
CKE
SDRAM_CLK 68
CLK
VCC33
R31 R31
10K 10K
8 SDRAM_CKE
7
6
SDRAM_CAS_L
5
SDRAM_RAS_L
8 SDRAM_DQM_3
7 SDRAM_DQM_2
6 SDRAM_DQM_1
5 SDRAM_DQM_0
CPU_WR_L
22 22
CPU_RD_L
8
SCAN_CS_L sh.3,5
7 UART_CS_L
UART_CS_L
6
FLASH_CS_L sh.3,5
5
LCD_CS_L sh.3,4,5
5
SDRAM_CS_L
6
MARA_1_CS_L
7
8 VCC33
BOOT_CS_L sh.3,5
22 22
CPU_WAIT_L sh.2,3,5
ADTRG_L sh.3,5
R27 R27
10K 10K
USB_DP sh.4
USB_DM sh.4
USB_VBUS sh.4
C34 C34
CLK_48MHZ
VCC33 0.1uF 0.1uF
L3 L3 OSC48_VCC
USB_APVCC
VCC33
C36 C36
600 OHM @ 100MHz 600 OHM @ 100MHz Y1 Y1
0.1uF 0.1uF
C37 C37 VCC33
3 1
OUT EN
VCC12 0.1uF 0.1uF
GND
VCC12
L5 L5 48.0000 MHz 48.0000 MHz
USB_AVCC
C38 C38 C39 C39
600 OHM @ 100MHz 600 OHM @ 100MHz
0.1uF 0.1uF 0.1uF 0.1uF
VCC33
VCC33 VCC33
VCC33
R20 R20 R21 R21
U29 U29
1.0K 1.0K 1.0K 1.0K
4 C40 C40 + + C41 C41 C42 C42
VCC
1
I2C_SDA
SDA
C77 C77 100uF 100uF 0.1uF 0.1uF 0.1uF 0.1uF
I2C_SCL 3 0.1uF 0.1uF
SCL
2
GND
24AA02E48_SOT 24AA02E48_SOT
3
2
C21 C21 C22 C22 C23 C23 C24 C24 NAND FLASH
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
U3 U3
CPU_A_2
CPU_A_3
sh.3 FLRD_L
sh.3 FLWR_L
FLWP_L
FLCS_L
56 CPU_D_31
DQ31
54 CPU_D_30
DQ30
53 CPU_D_29 NAND512W3A2BN NAND512W3A2BN
QD29
51 CPU_D_28
DQ28
50 CPU_D_27
DQ27
48 CPU_D_26
DQ26
47
CPU_D_25
DQ25
45 CPU_D_24
DQ24
42 CPU_D_23 BOOT FLASH
DQ23
40 CPU_D_22
DQ22
39 CPU_D_21
DQ21
37 CPU_D_20
DQ20
36 CPU_D_19
DQ19
34 CPU_D_18
DQ18
33 CPU_D_17
DQ17
31 CPU_D_16
DQ16
85
CPU_D_15
DQ15
83 CPU_D_14 CPU_A_18
DQ14
82 CPU_D_13 CPU_A_17
DQ13
80 CPU_D_12 CPU_A_16
DQ12
79 CPU_D_11 CPU_A_15
DQ11
77 CPU_D_10 CPU_A_14
DQ10
76 CPU_D_9 CPU_A_13
DQ9
74 CPU_D_8 CPU_A_12
R4 R4
DQ8
13 CPU_D_7 10K 10K CPU_A_11
DQ7
11 CPU_D_6 CPU_A_10
DQ6
10 CPU_D_5 CPU_A_9
DQ5
8 CPU_D_4 CPU_A_8
DQ4
7 CPU_D_3 VCC33 CPU_A_7
DQ3
5 CPU_D_2 CPU_A_6
DQ2
4 CPU_D_1 CPU_A_5
DQ1
2 CPU_D_0 CPU_A_4
DQ0
R32 R32 CPU_A_3
10K 10K CPU_A_2
CPU_A_1
sh.3 BOOT_FL_CS_L
sh.3 BOOT_FL_OE_L
CPU_WR_L
sh.3,5 RESET_L
S29AL004D S29AL004D
sh.3 BOOT_E_CS_L
CPU_A_17
sh.5
BOOT DEVICE SELECTION CPU_A_15
sh.5
CPU_A_13
CPU_A_11
CPU_A_9
CPU_A_7
CPU_A_5
CPU_A_3
CPU_A_1
sh.3,5
sh.3,4,5
CPU_D_15
0 0 0 0 1 CPU_D_13
sh.3,5
CPU_D_11
0 0 1 1 0 CPU_D_9
CPU_D_7
sh.5
0 1 0 1 0 CPU_D_5
sh.2,5
CPU_D_3
0 1 1 1 0 * CPU_D_1
VCC33
1 X X 1 1
R24 R24
sh.1,3 EPROM_INST_L
10K 10K
VCC33
L4 L4
sh.5 RESET
C35 C35
600 OHM @ 100MHz 600 OHM @ 100MHz CPU_A_1
0.1uF 0.1uF R15 R15 CPU_D_7
10K 10K CPU_D_5
CPU_D_3
CPU_D_1
sh.3 UART_WR_L
sh.3 UART_RD_L
CPU_IRQ_0_L
VCC
SH7203 BYPASS CAPS
C43 C43 C44 C44 C45 C45 C46 C46 C47 C47 C48 C48 C49 C49 C50 C50 C51 C51
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
Title
Size
Date:
2
CUP2 Service Manual
1
CPU_A_[22:0] sh.2,3,4,5
CPU_D_[31:0] sh.2,3,4,5
VCC33
C25 C25 C26 C26
0.1uF 0.1uF 0.1uF 0.1uF
44 CPU_D_7
I/O_7 D
16 43 CPU_D_6
CLE I/O_6
17 42 CPU_D_5 VCC33
ALE I/O_5
41 CPU_D_4
I/O_4
8 32 CPU_D_3
RE I/O_3
18 31 CPU_D_2
WE I/O_2
30 CPU_D_1 R2 R2
I/O_1
19 29
CPU_D_0 1.0K 1.0K
WP I/O_0
9 7 FLRDY
CE R/B
VCC33
C28 C28
U4 U4
0.1uF 0.1uF
16
NC/A18
17
A17
48
A16
1 45 CPU_D_15
A15 DQ15/A-1
2 43 CPU_D_14
A14 DQ14
3 41 CPU_D_13
A13 DQ13
4 39 CPU_D_12
A12 DQ12
5 36 CPU_D_11
A11 DQ11
6 34 CPU_D_10
A10 DQ10
7 32 CPU_D_9
A9 DQ9
8 30 CPU_D_8
A8 DQ8
18 44 CPU_D_7
C
A7 DQ7
19 42 CPU_D_6
A6 DQ6
20 40 CPU_D_5
A5 DQ5
21 38 CPU_D_4 VCC33
A4 DQ4
22 35 CPU_D_3
A3 DQ3
23 33 CPU_D_2
A2 DQ2
24 31 CPU_D_1
A1 DQ1
25 29 CPU_D_0 R5 R5
A0 DQ0
1.0K 1.0K
26
CE
28 15 BOOT_RDY
OE RY/BY
11
WE
12
RST
27
VSS
47 46
BYTE VSS
J1 J1 VCC33
1 2
3 4 CPU_A_18
5 6 CPU_A_16
7 8 CPU_A_14
9 10 CPU_A_12
11 12 CPU_A_10 BOOT EPROM
13 14 CPU_A_8
MODULE
15 16 CPU_A_6
17 18 CPU_A_4
19 20 CPU_A_2
21 22
23 24 CPU_D_14
B
25 26 CPU_D_12
27 28 CPU_D_10
29 30 CPU_D_8
31 32 CPU_D_6
34
33 CPU_D_4
35 36 CPU_D_2
37 38 CPU_D_0
39 40
HEADER 20X2 HEADER 20X2
J3 J3 DNS DNS VCC33
UART DEBUG
1 2
MODULE
3 4 CPU_A_2
5 6 CPU_A_0
7 8
CPU_D_6
9 10 CPU_D_4
11 12 CPU_D_2
13 14 CPU_D_0
15 16
17 18 UART_CS_L
19 20 CPU_IRQ_1_L
21 22
23 24
25 26
HEADER 13X2 HEADER 13X2
A
Young Chang R&D Institute
1432 Main St.
Waltham MA 02451
USA Copyright 2010 Young Chang Co., Ltd.
Reproduction without the express written consent of Young Chang Co., Ltd. is prohibited.
RP2A ENGINE BOARD - SP4x Configuration
SH7203 CPU, Memory, and Debug UART Header
By Document Number Rev
R. Folk 021402 DV2-A
Friday, January 07, 2011 Sheet 1 of 5
1
7- 3