Table of Contents
Advertisement
CXD8817Q (SONY)
C-MOS VIDEO TIMING SIGNAL GENERATOR
—TOP VIEW—
65
66
67
68
69
70
71
72
V
DD ( +5V )
73
GND
74
75
76
77
78
79
80
PIN
PIN
PIN
I/O
SIGNAL
I/O
SIGNAL
I/O
NO.
NO.
NO.
1
I
AD0
21
—
V
41
DD
2
I
AD1
22
—
V
42
DD
3
—
V
23
—
NC
43
DD
4
—
V
24
O
DA135
44
DD
5
I
AD2
25
O
SAWD7
45
6
I
AD3
26
O
SAWD6
46
7
I
SCK
27
O
SAWD5
47
8
I
SIN
28
O
SAWD4
48
9
O
SOUT
29
O
SAWD3
49
10
I
START
30
O
SAWD2
50
11
O
COMPSYNC
31
O
SAWD1
51
12
—
GND
32
O
SAWD0
52
13
O
HDG
33
—
GND
53
14
O
VDG
34
—
V
54
DD
15
O
OEG
35
I
CK27
55
16
O
CFG
36
—
GND
56
17
I
TEST1
37
O
DA4FSC
57
18
I
TEST2
38
O
SYNCD9
58
19
O
TESTOUT
39
O
SYNCD8
59
20
I
RESET
40
O
SYNCD7
60
INPUT
8
9
SIN
SOUT
AD0 - AD3
7
66
SCK
FSC
BURST
10
65
START
SAMPN
CFRST
64
SAMPP
CFSET
1
60
AD0
BURSTG
CK27
2
AD1
CK4FSC
5
59
AD2
BURSTEX
D1SYNC
6
58
AD3
SYNCEX
DSYNC1
32
SAWD0
DSYNC2
69
31
LOCKERROR
SAWD1
EXT4FSC
63
30
CK4FSC
SAWD2
FRRST
56
29
EXT4FSC
SAWD3
LOCKERR
55
28
FRRST
SAWD4
RESET
27
SAWD5
SCK
68
26
SYNC
SAWD6
SIN
25
SAWD7
START
67
BURST
SYNC
35
13
CK27
HD
TEST
77
11
DSYNC ( 1 )
COMPSYNC
TEST1, 2
54
16
CFRST
CFG
OUTPUT
71
15
CFSET
OEG
BURSTEX
52
14
VDG
D1 SYNC
BURSTG
20
RESET
CFG
49
SYNCD0
COMPSYNC
48
SYNCD1
DA135
74
47
TEST
SYNCD2
DA4FSC
17
46
TEST1
SYNCD3
DETCF
18
45
SYNCD4
TEST2
DSELECT
42
SYNCD5
FSC
19
41
TEST OUT
SYNCD6
HDG
40
SYNCD7
MASKSYNC
39
SYNCD8
OEG
38
SYNCD9
SAMPN
SAMPP
76
DSELECT
SAWD0 - SAWD7
75
SYNCGATE
SCH
SOUT
SYNCD0 - SYNCD9
SYNCEX
SYNCGATE
SYNCNT
TESTOUT
VDG
CA-702
CA-702P
40
39
38
37
GND
36
35
V
DD ( +5V )
34
GND
33
32
31
30
29
28
27
26
25
( V
= +5V )
DD
PIN
SIGNAL
I/O
SIGNAL
NO.
O
SYNCD6
61
—
V
DD
O
SYNCD5
62
—
V
DD
—
V
63
I
CK4FSC
DD
—
V
64
O
SAMPP
DD
O
SYNCD4
65
O
SAMPN
O
SYNCD3
66
O
FSC
O
SYNCD2
67
I
BURST
O
SYNCD1
68
I
SYNC
O
SYNCD0
69
I
LOCKERR
O
SYNCNT
70
O
MASKSYNC
—
GND
71
I
CFSET
I
D1SYNC
72
—
V
DD
—
GND
73
—
GND
I
CFRST
74
I
TEST
I
FRRST
75
O
SYNCGATE
I
EXT4FSC
76
O
DSELECT
—
GND
77
I
DSYNC1
O
SYNCEX
78
O
DETCF
O
BURSTEX
79
I
DSYNC2
O
BURSTG
80
O
SCH
; SERIAL PRESET ADDRESS
; REFERENCE BURST INPUT
; CF RESET FOR D2 LOCK
; EXTERNAL CF PULSE INPUT
; 27 MH
CLOCK
Z
; 4fsc CLOCK
; D1 SYNC FOR D1 LOCK
; DELAYED SYNC FOR CF DET
; DELAYED SYNC FOR SCH DET
; EXTERNAL 4fsc CLOCK
; FRAME RESET FOR D2 LOCK
; 4fsc PLL LOCK ERROR
; POWER ON RESET
; SERIAL CLOCK
; SERIAL DATA INPUT
; SERIAL START PULSE
; REFERENCE SYNC INPUT
; TEST PIN
; TEST PINS
; BURST EXIST : H
; BURST SAMPLE PULSE FOR NTSC
; COLOR FRAMING PULSE
; COMPOSITE SYNC
; 13.5 MH
CLOCK
Z
; 4fsc CLOCK
; DETECTED COLOR FRAMING
; HYSTERESIS CONTROL FOR CF DET
; FSC CLOCK
; HD PULSE
; GATED SYNC
; ODD / EVEN PULSE
; BURST SAMPLE ( _ ) FOR PAL
; BURST SAMPLE ( + ) FOR PAL
SAW-TOOTH DATA ( 0 - 7 )
; 27 MH
Z
; DETECTED SCH
; SERIAL DATA OUTPUT
; 4fsc SYNC DATA ( 0 - 9 )
; SYNC EXIST : H
; SELECTED SYNC FOR CF DET
; 4fsc SYNC FOR NTSC
; TEST PIN
; VD PULSE
9
SOUT
8
SIN
SERIAL
7
TRAPE
SCK
INTERFACE
10
GENERATOR
18
DECODER
START
1, 2, 5, 6
AD0 - AD3
NTSC / PAL
35
27 MH
CK27
COUNTER,
HD/COMP.
SYNC GEN.
66
FSC
64
SAMPP
65
SAMPN
60
4 fsc
BURSTG
COUNTER
69
LOCKERR
63
CK4FSC
56
EXT4FSC
55
SYNC DATA
FRRST
GENERATOR
77
DSYNC1
79
DSYNC2
54
CFRST
71
COUNTER
CFSET
52
D1SYNC
70
MASKSYNC
68
SYNC
67
SYNC/
BURST
BURST
59
BURSTEX
DETECTOR
58
SYNCEX
20
RESET
17
TEST1
18
TEST2
74
TEST
EL4581CS-TE2 (ELT)FLAT PACKAGE
VIDEO SYNC SEPARATOR
—TOP VIEW—
V
COMPOSITE
CC
1
8
(+5V)
SYNC
OUT
COMPOSITE
2
7
ODD/EVEN
VIDEO
IN
VERTICAL
3
6
RSET
SYNC
OUT
4
GND
5
BURST/BACK
OUT
TIMING CHART
COMPOSITE
VIDEO IN
COMPOSITE
SYNC OUT
VERTICAL
SYNC OUT
BURST OUT
ODD/EVEN OUT
32 - 25
SAWD0 - SAWD7
80
SCH
13
HDG
Z
11
COMPSYNC
24
DA135
15
LINE
OEG
14
COUNTER,
VDG
VD/CF PULSE
16
CFG
GENERATOR
37
DA4FSC
49 - 45, 42 - 38
SYNCD0 - SYNCD9
77
DSYNC ( 1 )
79
DSYNC ( 2 )
CF
76
DSELECT
DETECTOR
78
DETCF
75
SYNC GATE
LINE
50
SYNCNT
19
TEST OUT
C
2
COMPOSITE
COMPOSITE
1
VIDEO
SYNC
OUT
VERTICAL
3
SYNC
7
ODD/EVEN
6
5
RSET
BURST/BACK
R
4-13
IC
Advertisement
Table of Contents
