Bose BUILT-INvisible TA-1 Service Manual page 6

THEORY OF OPERATION
Input/Output (I/O) PCB (continued)
S1 [A3] section 1, a user accessible switch, is used to connect the left and right inverting (–)
pins of the Music Inputs together. S1-section 2 is used to connect the left and right – pins of the
Video Inputs together. This is sometimes desirable for certain installation wiring situations, such
as where the source wiring presented to the TA-1 amplifier is left non-inverting (+), right +, and a
common ground (unbalanced). One might choose to close S1 and connect left + to left +, right +
to right +, and common ground to left – (S1 will tie left – to right – in this case).
Analog audio input selector
The two stereo inputs, Music Audio and Video Audio, after passing through their differential
amplifiers, are presented to U3 [B4], an analog multiplexer at pins 4, 5, 12 and 13. When the
Set_Audio (U3 pin 1) input is high, the Video Audio input is selected and passes through. When
the Set_Audio line is low, the Music Audio input is selected. From U3's outputs at pins 8 and 9,
the analog audio signals pass to J4-12 and 14, which carries them onto the DSP PCB, where
they enter the codec U100, [DSP schematic sheet 1, C4] and are converted to digital audio
signals.
Digital audio inputs
The four S/PDIF digital audio signals are delivered via J7 [C3], each in differential form. A typical
S/PDIF source, Source 1, is presented on J7-4 and J7-5 and passes through a DC blocking
capacitor (to keep the small transformer free of a DC bias) and into T1 [D3]. At the secondary,
the transformer is terminated in 75 Ohms to match the source impedance for best pulse fidelity.
Also at the secondary, the signal is referenced to ground and clamped to about +/-0.65 volts by
diode D8. The clamp is only active for higher than normal S/PDIF sources, but also protect the
inputs of U9 [D3], especially if signals are present while the power is off.
Digital audio input selector
The four single-ended digital sources are presented to U9 [D3], an analog multiplexer. Signals
DIG_SEL_A and DIG_SEL_B from the microcontroller U5 [C4] select one of the four inputs for
passage through U9. Signal DIG_EN can be used to disable the output regardless of the source
selection. From U9's output, the selected SPDIF signal passes to J4-8 [E4], which carries it onto
the DSP PCB, where it enters a codec U100, [DSP schematic sheet 1, C4] and is unpacked to
yield the embedded digital audio signals.
Power amplifier outputs
The power amplifier output devices U700, U701, U703, U704, U705 and U707 (and associated
power transistors) [amplifier PCB schematic sheet 1] are located on the power amplifier PCB
which is attached to the extruded top cover. The amplifier output signals and their ground returns
are carried via a wire harness from J701 [power amp schematic sheet 2, A-C7] on the amplifier
PCB to J22 [D2] on the I/O PCB. The six amplifier outputs are directly wired to the appropriate
loudspeaker connectors along the right hand edge of the PCB. The RC networks [E2] contribute
to amplifier stability and reduce EMC and ESD events.
Power supplies, +8V and +5V
The I/O PCB receives the AC mains power via J5 [C2] and S9, and through fuses F3 and F4.
The +8V and +5V supplies provide keep-alive voltages to the I/O PCB control circuitry that
enable the amplifier to remain in standby mode, but also allow it to wake up and go into operate
mode when it receives commands to do so. When main power switch S9 is on, the +8V and +5V
supplies are energized. At first, the amplifier will be in standby mode, characterized by the
presence of +8V and +5V, but with the triac Q6 [C1] off.
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