Fpd-Link Iii Signals; C Interface; C Device Address Select - J34; I 2 C Interface Header - J4 - Texas Instruments DS90UB954-Q1EVM User Manual

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Table 1-3. MIPI CSI-2 Output Signals - J5 and J6 Pinout (continued)
Pin #
21
23
25
27
29
31
33
35
37
39
NOTE: Populate R3,R8,R10,R30,R32,R40,R43,R45,R47,R49,R51,R53 (0Ω resistors) only when
using the J6 connector on the bottom of the board. Do not use J5 and J6 connectors at the
same time.

1.4.5 FPD-Link III Signals

Reference
RX0
RX1
2
1.4.6 I

C Interface

In addition to the on-board USB2ANY controller accessible via the mini-USB port, a standalone external
2
I C host can connect via J4 for programming purposes. Examples of external I
Texas Instruments USB2ANY and Total Phase Aardvark I
TP240141).
Optional access to I
levels can be configured through J1 to be at 1.8V or 3.3V when the I
connector J4.
Reference
J34
Reference
J4.1
J4.2
J4.3
J4.4
SNLU223 – December 2016
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Signal Name
CSI_D3_P
CSI_D3_N
CSI_CLK1_P
CS_CLK1_N
NC
NC
NC
NC
NC
NC
Table 1-4. FPD-Link III Signals
Signal
RIN0+
RIN1+
2
C signals are also available via CSI-2 connectors J5 (top) and J6 (bottom). I
2
Table 1-5. IDx I

C Device Address Select - J34

Signal
Selects I
IDX Open: 0x30 (7'b) or 0x60 (8'b)
Short: 0x3D (7'b) or 0x7A (8'b) (Default)
2
Table 1-6. I C Interface Header - J4
Signal
2
VDDIO I
2
I2C_SCL I
2
I2C_SDA I
GND Ground
Copyright © 2016, Texas Instruments Incorporated
Pin #
22
24
26
28
30
32
34
36
38
40
Description
FAKRA connector
FAKRA connector
2
C/SPI host adapter (Total Phase Part#:
2
C interface is accessed through
Description
2
C Device Address
Description
C bus voltage (tied to VDDIO)
2
C Clock Interface for primary I C bus
2
C Data Interface for primary I C bus
Demo Board Connections
Signal Name
SPI_CSn
(GPIO2 or GPIO5)
GND
NC
NC
VDD_3V3
VDD_3V3
VDD_3V3
VDD_3V3
VDD_1V8
VDD_1V8
2
C host controllers are
2
DS90UB954-Q1EVM User's Guide
C signal
11