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PRO-700HD
7 SAA4990H (SUB VIDEO ASSY: IC4719)
PROZONIC IC
¶ Pin Assignment
80
79
78
77
76
75
74
73
72
71
TEST1/AP
1
TEST2/SP
2
RE1
3
V
SS1
4
V
DD1
5
YUV
C7
6
YUV
7
C6
YUV
C5
8
YUV
9
C4
YUV
C3
10
V
11
SS2
SAA4990H
V
12
DD2
YUV
C2
13
YUV
C1
14
YUV
15
C0
YUV
16
C11
YUV
17
C10
YUV
18
C9
19
YUV
C8
CK
20
V
SS3
21
V
22
DD3
23
WE2
RE2
24
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
¶ Pin Function
Pin No.
Pin Name
1
TEST1/AP
2
TEST2/SP
3
RE1
4
VSS 1
5
VDD 1
6
YUV C7
7
YUV C6
8
YUV C5
9
YUV C4
10
YUV C3
11
VSS 2
12
VDD 2
13
YUV C2
14
YUV C1
15
YUV C0
16
YUV C11
17
YUV C10
18
YUV C9
19
YUV C8
20
CK
21
VSS 3
22
VDD 3
23
WE2
24
RE2
242
¶ Block Diagram
70
69
68
67
66
65
64
H
O
YUV
A
63
12
AUX
62
SNCL
61
YUV
SNDA
B
12
60
SNRST
59
V
SS7
58
V
DD7
57
YUV
D7
56
YUV
D6
12
55
YUV
D5
YUV
C
54
YUV
D4
53
YUV
D3
52
V
SS6
51
V
DD6
50
YUV
D2
49
YUV
D1
48
YUV
D0
47
YUV
D11
46
V
SS5
45
V
DD5
44
YUV
D10
43
YUV
D9
42
YUV
D8
41
HD
I/O
Action pin for testing to be connected to Vss
I
Shift pin for testing to be connected to Vss
I
Read enable to FM1
O
Ground 1
—
Supply voltage 1
—
Y bit 7 to FM2
O
Y bit 6 to FM2
O
Y bit 5 to FM2
O
Y bit 4 to FM2
O
Y bit 3 to FM2
O
Ground 2
—
Supply voltage 2
—
Y bit 2 to FM2
O
Y bit 1 to FM2
O
Y bit 0 to FM2
O
UV bit 3 to FM2
O
UV bit 2 to FM2
O
UV bit 1 to FM2
O
UV bit 0 to FM2
O
Master clock,nominal 27 or 32 MHz
I
Ground 3
—
Supply voltage 3
—
Write enable to FM2
O
Read enable to FM2
O
UV1
REFPRMATTER
4
NOISE
LINE
REDUCTION
MEMORY 1
UV2
REFPRMATTER
4
8
Y1
NOISE
LINE
8
REDUCTION
Y2
MEMORY 1
8
4
FORMATTER
8
MICROPROCESSOR
MOVIE
PHASE
DETECTOR
Function
LINE
LINE
MEMORY 2
MEMORY 3
FORMATTER
MIXER
MIXER
LINE
LINE
MEMORY 2
MEMORY 3
MEDIAN
MIXER
FILTER
SAA4990H
INTERFACE
CONTROL BLOCK
(SNERT)
3
2
2
SNCL,SNDA,
CK
VD,HD RE,WE
SNRST
12
YUV
D
RE1
3
RE2
WE2
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