Table of Contents
Advertisement
Chapter 2
Assign IRQ For USB
Lets the user choose which IRQ to assign for the USB.
The Choices: Enabled (default), Disabled.
PCI Master Pipeline Req
This item allows you to enable/disable the PCI master pipeline request feature.
The Choices: Enabled (default), Disabled.
P2C/C2P Concurrency
This item allows you to enable/disable the PCI to CPU, CPU to PCI concurrency.
The Choices: Enabled (default), Disabled.
Fast R-W Turn Around
This item controls the DRAM timing. It allows you to enable/disable the fast
read/write turn around.
The Choices: Disabled (default), Enabled.
PCI Dynamic Bursting
When Enabled, every write transaction goes to the write buffer. Burstable
transactions the burst on the PCI bus and nonburstable transactions don't.
The Choices: Enabled (default), Disabled.
PCI Master 0 Ws Write
When Enabled, writes to the PCI bus are executed with zero-wait states.
The Choices: Enabled (default), Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select Enabled to support compliance with PCI specification.
The Choices: Enabled (default), Disabled.
2-31
BIOS Setup
Hide quick links:
Advertisement
Table of Contents
