Two Half-Words Packed Into A Single General Purpose Register - Texas Instruments TMS320C6000 Programmer's Manual

Packed-Data Processing on the 'C64x
Figure 8–2. Two Half–Words Packed Into a Single General Purpose Register.
8-6
16 bits
Halfword 1
Halfword 1
32 bits
Notice that there is no distinction between signed or unsigned data made in
Figure 8–1 and Figure 8–2. This is due to the fact that signed and unsigned
data are packed identically within the register. This allows the instructions
which are not sensitive to sign bits (such as adds and subtracts) to operate on
signed and unsigned data equally. The distinction between signed and un-
signed comes into play primarily when performing multiplication, comparing
elements, and unpacking data (since either sign or zero extension must be
performed).
Table 8–2 provides a summary of the operations that the 'C64x provides on
packed data types, and whether signed or unsigned types are supported. In-
structions which were not specifically designed for packed data types can also
be used to move, store, unpack, or repack data.
16 bits
Halfword 0
General purpose
Halfword 0
register