Page Concept - Yamaha V9938 Programmer's Manual

Msx-video
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4.2. Page concept

As we have already seen, programmer can have several options to place tables in the
video memory by altering base address registers. In some modes there're more options
(like in Text 1 there're 32 options and in GRAPHICS7 there're only 2 options). This
introduces a concept of the page defined by where VDP currently operates and where it
takes information for picture display from.
Page concept is stricter in relation to VDP commands. VRAM access is defined by X
and Y coordinates, and not by physical address within VRAM. Coordinate X is specified by 9
bits, and can be in range of 0...511, coordinate Y is specified by 10 bits, and can be in
range of 0...1023. See the table below for VRAM paging in various video modes.
GRAPHIC4
(0, 0)
Page 0
(0, 255)
(0, 256)
Page 1
(0, 511)
(0, 512)
Page 2
(0, 767)
(0, 768)
Page 3
(0, 1023)
GRAPHIC7
(0, 0)
Page 0
(0, 255)
(0, 256)
Page 1
(0, 511)
In G4 and G5 modes there're four pages; in G6 and G7 modes there're only two
pages. For example, setting Y coordinate in G5 mode to 658 will automatically choose page
#2 with specific translated initial VRAM address.
Note that VDP is capable of displaying maximum of 212 lines, and programmer has
an option to use register R#23 to set visible screen window position within active page.
© 1985 ASCII CORP. / NIPPON GAKKI CO.
Address
(255, 0)
0000h
(255, 255)
(255, 256)
08000h
(255, 511)
(255, 512)
10000h
(255, 767)
(255, 768)
18000h
(255, 1023)
1FFFFh
(255, 0)
0000h
(255, 255)
(255, 256)
10000h
(255, 511)
1FFFFh
Page 64 of 108
GRAPHIC5
(0, 0)
Page 0
(0, 255)
(0, 256)
Page 1
(0, 511)
(0, 512)
Page 2
(0, 767)
(0, 768)
Page 3
(0, 1023)
GRAPHIC6
(0, 0)
Page 0
(0, 255)
(0, 256)
Page 1
(0, 511)
© 2010-2015 Eugeny Brychkov
(511, 0)
(511, 255)
(511, 256)
(511, 511)
(511, 512)
(511, 767)
(511, 768)
(511, 1023)
(511, 0)
(511, 255)
(511, 256)
(511, 511)

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