Yamaha V9938 Programmer's Manual page 16

Step 2: Setting the address counter A16 to A14
VDP can logically address 128K bytes in the address range of 00000h-1FFFFh through
16 address bits A16...A0. At this step we set up bits A16...A14 writing them into register
R#14 (VRAM access base address register).
MSB
Register #14
Step 3: Setting the address counter A7 to A0
Set the low-order eight bits A7...A0 of the address counter by writing data to port #1.
MSB
Port #1
Step 4: Setting the address counter A13 to A8 and operation mode
Set the remaining six bits A13...A8 of the address counter by writing data to the port
#1.
You also should specify which memory operation will follow – read or write. It is very
important, as if you specify that next operation will be a "read", VDP will pre-fetch value
from the memory (specified by the address set up earlier) and will get ready for CPU data
read. If you will not do so and issue read command, VDP may not get enough timeslot to
read data from the VRAM and CPU may get invalid data.
If you specify that next command will be a "write", then VDP does not do pre-fetch
and waits for write instead.
MSB
Port #1
Step 5: Reading or writing data to memory
It is important to know that after every data read or data write operation from port
#0 address counter is being incremented. It is very useful when you need to read from or
write to the memory in sequential manner. However you should mind the timing, ensuring
that VDP has enough time to write cached data or read requested data. Please refer to the
data sheet for timings.
MSB
Port #0
© 1985 ASCII CORP. / NIPPON GAKKI CO.
7 6 5
0 0 0
7 6 5
A7 A6 A5
7 6 5
0 W A13
0: Next command is "Data Read"
1: Next command is "Data Write"
7 6 5
D7 D6 D5
4 3 2
0 0 A16
4 3 2
A4 A3 A2
4 3 2
A12 A11 A10
4 3 2
D4 D3 D2
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1 0 LSB
A15 A14 Base reg
1 0 LSB
A1 A0 A7...A0
1 0 LSB
A9 A8 A13...A8
1 0 LSB
D1 D0 Data
Addr ++
© 2010-2015 Eugeny Brychkov