Yamaha V9938 Programmer's Manual page 44

3.5.2. Pattern Tables
The pattern generator table is a location in VRAM that stores patterns (font). Each
pattern has number from PN0 to PN255, for every ⅓ of the screen. The font displayed on
the screen for each pattern is constructed from 8 bytes, with all 8 bits of each byte
displayed. Pattern generator table base is stored in the register R#4.
MSB
R#4
The pattern layout table is a map of the screen (per screen image). Every byte
location of the screen contains code of the pattern displayed at respective location. This
table has three 32*8 locations (upper, middle and lower) arranged consecutively where
defined patterns can be displayed. Pattern layout table base address is stored in register
R#2, and corresponds to the cell (0, 0) with address 0 in the picture below.
Example of pattern generator table is provided below. Color table identifies color 1
(upper four bits) and color 0 (lower four bits) for every row of the pattern.
MSB
Offset 7 6 5
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
●
© 1985 ASCII CORP. / NIPPON GAKKI CO.
7 6 5
0 0 A16
LSB
4 3 2 1 0
Pattern
number 0
(PN0)
Pattern
number 1
(PN1)
● ●
4 3 2
A15 A14 A13
MSB
7 6 5 4 3 2 1 0 Offset
1 1 1 1 0 0 0 0 0
1 1 1 1 0 0 0 0 1
1 1 1 1 0 0 0 0 2
1 1 1 1 0 0 0 0 3
1 1 1 1 0 0 0 0 4
1 1 1 1 0 0 0 0 5
1 1 1 1 0 0 0 0 6
1 1 1 1 0 0 0 0 7
1 1 1 1 0 0 0 0 8
1 1 1 1 0 0 0 0 9
1 1 1 1 0 0 0 0 10
1 1 1 1 0 0 0 0 11
1 1 1 1 0 0 0 0 12
1 1 1 1 0 0 0 0 13
1 1 1 1 0 0 0 0 14
1 1 1 1 0 0 0 0 15
Page 44 of 108
1 0 LSB
1 1 Pattern
generator table
base address
LSB
© 2010-2015 Eugeny Brychkov