Avoiding Data Alu Pipeline Interlocks; Code Reorder - Motorola DSP56600 Manual

Application optimization for digital signal processors
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and Status Interlock may be avoided by adding some useful
instructions in between the instructions. The following paragraph
will demonstrate few ways to overcome the Arithmetic Interlock.
6.1.2

Avoiding Data ALU Pipeline Interlocks

There are few common ways to avoid the Arithmetic Interlock. The
first is to change the order of the instructions such that a sequence
that caused the interlocks will not be part of the re-ordered code.
The second is to unroll the loop and use two accumulators in an
interleaving manner.
6.1.2.1

Code Reorder

The following DSP56000 program code is part of Real input FFT
based on Glenn Bergland algorithm. It is taken from Appendix B of
the DSP56000 Family Manual (Figure B-5, sheet 7):
move
x:(r0)+,x1y:(r4)-,y1
mpy
x1,y0,B x:(r3)+,r7
mac
x0,y1,B x:(r3)+,r1
sub
B,A
addl
A,B
mpy
y1,y0,A B,x:(r7)
mac
-x1,x0,Ay:(r4)+n4,B
sub
B,A
addl
A,B
move
x:(r0)+,A B,y:(r7)
move
y:(r4)+,B
This code consists of four arithmetic stalls that are caused by the
accumulator read operation in the fifth, sixth, ninth, and tenth
instructions. By reordering the parallel moves we can write a similar
code that consists of no pipeline interlocks at all (notice that pointers
r4 and r0 were switched).
move
x:(r4)+,x1y:(r0)-,y1
mpy
x1,y0,B x:(r3)+,r7
mac
x0,y1,B x:(r3)+,r1
sub
B,A
addl
A,B
mpy
y1,y0,A A,x:(r1)
mac
-x1,x0,AB,x:(r7)y:(r0)+n0,B
sub
B,A
addl
A,B
MOTOROLA
Optimizing DSP56300/DSP56600 Applications
A,x:(r1)
x:(r2)+,x0y:(r6)+,y0
A,y:(r1)
x:(r2)+,x0y
;x1=b, y1=d, r4 ptr back to c
;A=bWr,
;B=bWr+dWi=T1, get first index
;A=a-T1=c', get second index
;B=a+T1=a', PUT c' to x:b
;B=dWr, B=c PUT a'
;A=dWi-bWr=T2, B=c, r4 ptr to
;next c
;A=T2-c=d',x0=next Wi,y0=next
;Wr
;B=T2+c=b',update r4,A=next a,
;PUT d'
;PUT b', A=next a
;B=next c
;x1=b, y1=d, r0 ptr back to c
;A=bWr,
;B=bWr+dWi=T1, get first index
;A=a-T1=c', get second index
;B=a+T1=a', PUT c' to x:b
;B=dWr, B=c PUT a'
;A=dWi-bWr=T2, B=c, r0 ptr to
;next c
:(r6)+,y0;A=T2-c=d',x0=next Wi,
;y0=next Wr
;B=T2+c=b',update r0,
Pipeline Interlocks
Data ALU Pipeline Interlocks
6-3

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