Using Slow, Low-Cost Memories - Motorola DSP56600 Manual

Using the DMA

Using Slow, Low-Cost Memories

4-4 Optimizing DSP56300/DSP56600 Applications
Another possible application of this kind is in a multi-tasking
operating system: the DMA can be periodically activated by the
timer, and load the program of the next process, while the core
executes another code segment.
4.3 USING SLOW, LOW-COST MEMORIES
In many systems, data that is stored in external memory is not
frequently used, and can be loaded at a relatively slow rate. In
principle, this permit the use of slow, low-cost memories.
Interfacing such memories, however, can sometime require glue
hardware and management software, thus cutting possible savings
and performance gain. The DSP56300 was designed specifically
with features to support the use of low-cost memories, thus
reducing the overall system cost and software development time.
The External Memory Interface (DSP56300 only) supports glueless
connection to various types of external memory devices (DRAMs,
SRAMs and SSRAMs), and has the following supporting features:
• Programmable number of wait states
• Specialized address attributes pins, which can be used as
programmable chip-selects, masking address ranges and
memory spaces (x, y or p); each may support a different
memory type
• On-chip DRAM controller with programmable in-page and
out-of-page wait states and refresh control
More detailed information on these and other features could be
found in Section 2 of the DSP56300 Family Manual .
The parallel operation of the DMA, as in the example above, is
especially suited to load data slowly from an external memory
device. The resulting wait states do not effect program execution at
the core, as long as the core does not also attempt to use the external
port. For applications in which such contentions may occur, the user
can assign priorities between the core and each DMA channel, and
change them dynamically. For details, see Section 8 of the
DSP56300 Family Manual .
The DMA and BIU have a specialized Packing mode to support
external 8-bit memory devices. In this mode, each external DMA
access is translated to three hardware accesses to consecutive
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