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Warranty The NI 6601, NI 6602, and NI 6608 devices are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period.
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Operation of this hardware in a residential area is likely to cause harmful interference. Users are required to correct the interference at their own expense or cease operation of the hardware. Changes or modifications not expressly approved by National Instruments could void the user’s right to operate the hardware under the local regulatory rules.
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Contents Chapter 3 Signal Connections Programmable Function Interfaces (PFIs)..............3-1 Digital Filtering ......................3-1 Power-On State......................3-3 Pin Assignments ......................3-3 I/O Connector Pinout..................... 3-5 Outputs .......................... 3-8 Counters......................... 3-10 Counter n Source Signal ................. 3-10 Counter Source to Counter Out Delay..........3-12 Counter n Gate Signal ..................
About This Manual This manual describes the electrical and mechanical aspects of the National Instruments NI 6601, NI 6602, and NI 6608 devices, and contains information about device operation and programming. Unless otherwise noted, text applies to all NI 660x devices. The PCI and PXI implementations are the same in functionality;...
• NI 660x Specifications—This document contains specifications for the NI 6601, NI 6602, and NI 6608 devices. • DAQ Getting Started guides—These guides describe how to install the NI-DAQ driver software and the DAQ device, and how to confirm that the device is operating properly.
TTL/CMOS-compatible digital I/O. The NI 6602 offers this capability and four additional 32-bit counter channels. The NI 6608 is a functional superset of the NI 6602 device with a high-stability clock called an oven-controlled crystal oscillator (OCXO). The counter/timer channels have many measurement and generation...
Chapter 1 Introduction The specification permits vendors to develop sub-buses that coexist with the basic PCI interface on the bus. Compatible operation is not guaranteed between devices with different sub-buses nor between devices with sub-buses and PXI. The standard implementation for CompactPCI does not include these sub-buses.
Chapter 2 Device Overview Figure 2-1 shows an example of prescaling. External Signal Prescaler Rollover (Used as Source by Counter) Counter Value Figure 2-1. Prescaling Example Prescaling is intended for use with two counter period and frequency measurements where the measurement is made on a continuous, repetitive signal.
Chapter 2 Device Overview Example Application That Works Incorrectly (Duplicate Counting) In Figure 2-5, after the first rising edge of Gate, no Source pulses occur. So the counter does not write the correct data to the buffer. No Source edge, so no value written to buffer.
Chapter 2 Device Overview Transfer Rates The maximum sustainable transfer rate a TIO device can achieve for a buffered acquisition depends on the following factors: • Amount of available bus bandwidth • Processor speed and operating system • Application software To reduce the amount of bus activity, limit the number of devices generating bus cycles.
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Chapter 2 Device Overview Slot 2, the chassis disables its internal clock, then uses the OCXO clock instead, illustrated in Figure 2-7. Note The PXI CLK10 in pin is used as the PXI Star pin in other slots. The PXI Star pin is not used for the PXI backplane clock.
NI 660X Register-Level Programmer Manual, available from ni.com/manuals The National Instruments Measurement Hardware DDK provides development tools and a register-level programming interface for NI data acquisition hardware. The NI Measurement Hardware DDK provides access to the full register map of each device and offers examples for completing common measurement and control functions.
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Chapter 3 Signal Connections consecutive rising edges of the filter clock. The frequency of the filter clock timebase determines whether a transition in the signal may propagate or not. The function of the internal sampling clock is to increase the sampling rate and prevent aliasing.
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Chapter 3 Signal Connections Table 3-2. NI 660x Connector Pin Assignments Motion Counter Counter Motion Signal Encoder Context Context Encoder Signal Name Context Context (Default) Number Number (Default) Context Context Name PFI 31 channel P0.31 CTR 2 — — — D GND A(2) D GND...
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Chapter 3 Signal Connections PFI 31/P0.31/CTR 2 SOURCE D GND D GND PFI 30/P0.30/CTR 2 GATE PFI 28/P0.28/CTR 2 OUT PFI 29/P0.29/CTR 2 AUX PFI 27/P0.27/CTR 3 SOURCE D GND D GND PFI 26/P0.26/CTR 3 GATE PFI 24/P0.24/CTR 3 OUT PFI 25/P0.25/CTR 3 AUX PFI 23/P0.23 D GND...
Chapter 3 Signal Connections Outputs PFI <0..7> are used for DIO only. PFI <32..39> are used for counters and motion encoders only. You can use PFI <8..31> as either of the three choices. When used as an output, you can individually configure each PFI line as a DIO line or a counter line (you need not distinguish between counter/encoder or DIO applications when you use a PFI line as an input).
Chapter 3 Signal Connections For NI 6602 devices, output frequency on any of the pins should not exceed 40 MHz. Note The maximum frequency you can drive at the I/O connector is affected by the capacitive load your cable presents. You can achieve 40 MHz output with a National Instruments 1 m SH68-68-D1 shielded cable (capacitive load = 80 pF).
Chapter 3 Signal Connections Counter Source to Counter Out Delay Figure 3-5 shows the CtrnSource to CtrnInternalOutput delay. CtrnSource CtrnInternalOutput Figure 3-5. CtrnSource to CtrnInternalOutput Delay Figure 3-5 shows the delay between the active edge of the CtrnSource signal and the active edge of the CtrnInternalOutput signal. In the figure, the CtrnSource and CtrnInternalOutput signals are active high.
Chapter 3 Signal Connections Figure 3-7 shows the timing requirements for the CtrnAux signal. Tauxpw CtrnAux Tauxpw Figure 3-7. Timing Requirements for the CtrnAux Signal Table 3-7. Minimum Pulse Width for CtrnAux Internal Signals Minimum with RTSI Parameter Minimum Connector Description Tauxpw 5 ns...
Any TIO device can drive its 20MHzTimebase signal onto the RTSI Trigger 7 pin. Although some TIO devices have a 80MHzTimebase (such as the NI 6602), the RTSI bus cannot carry the 80MHzTimebase signal for bandwidth reasons. By default, TIO devices do not drive the RTSI Trigger 7 bus clock line.
Caution for output on the NI 660x device, or any voltage source or output pin on another device. Doing so can damage the device and the computer. National Instruments is not liable for damages resulting from such a connection. I/O Signals...
Chapter 3 Signal Connections Inductive Effects For high-speed signals, inductive effects can degrade signal integrity and cause ringing. To minimize inductive effects, you must minimize ground loops and allow a return path for currents. Twist your signal with a ground wire when you connect it to the 68-pin connector block you are using.
Chapter 3 Signal Connections Table 3-9. Signals and D GND Pin Number on 68-Pin Connector Block (Continued) PFI Number Pin Number for D GND PFI 36 PFI 37 PFI 38 PFI 39 Transmission Line Effects Transmission line effects can degrade the signal and cause measurement errors.
Technical Support and Professional Services Visit the following sections of the award-winning National Instruments Web site at for technical support and professional services: ni.com • Support—Technical support at includes the ni.com/support following resources: – Self-Help Technical Resources—For answers and solutions,...
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Appendix A Technical Support and Professional Services • Declaration of Conformity (DoC)—A DoC is our claim of compliance with the Council of the European Communities using the manufacturer’s declaration of conformity. This system affords the user protection for electromagnetic compatibility (EMC) and product safety.
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Glossary asynchronous A property of an event that occurs at an arbitrary time, without synchronization to a reference clock. bit—one binary digit, either 0 or 1. byte—eight related bits of data, an eight-bit binary number. Also used to denote the amount of memory required to store one byte of data. base address A memory address that serves as the starting address for programmable registers.
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DIO boards plugged into a computer, and possibly generating control signals with D/A and/or DIO boards in the same computer. DAQ-STC A custom ASIC developed by National Instruments that provides timing information and general-purpose counter/timers on National Instruments E Series boards.
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Glossary direct memory access—a method by which data can be transferred to/from computer memory from/to a device or memory on the bus while the processor does something else. DMA is the fastest method of transferring data to/from computer memory. driver Software that controls a specific hardware device such as a DAQ board.
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Glossary MITE A custom ASIC designed by National Instruments that implements the PCI bus interface. The MITE supports bus mastering for high speed data transfers over the PCI bus. motion encoders Transducers that generate pulses to indicate the physical motion of a device.
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The oscillation of a signal about a high-voltage or low-voltage state immediately following a transition to that state. RTSI Bus real-time system integration bus—the National Instruments timing bus that connects DAQ boards directly, by means of connectors on top of the boards, for precise synchronization of functions.
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Glossary start trigger A TTL level signal having two discrete levels, a high and a low level, that starts an operation. synchronous A property of an event that is synchronized to a reference clock. terminal count—a strobe that occurs when a counter reaches zero from either direction.