Siemens ERTEC200 Manual page 84

Enhanced real-time ethernet controller
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LBU_P0_RG_H
LBU_P1_RG_H
LBU_P2_RG_H
LBU_P3_RG_H
Description
High word of LBU Pagex_Range_register
Bit No.
Name
15..0
LBU_P0_OF_L
LBU_P1_OF_L
LBU_P2_OF_L
LBU_P3_OF_L
Description
Low word of LBU Pagex_Offset_register
Bit No.
Name
15..0
LBU_P0_OF_H
LBU_P1_OF_H
LBU_P2_OF_H
LBU_P3_OF_H
Description
High word of LBU Pagex_Offset_register
Bit No.
Name
15..0
LBU_P0_CFG
LBU_P1_CFG
LBU_P2_CFG
LBU_P3_CFG
Description
Configuration for the individual pages
Bit No.
Name
15..1
0
PAGE_X_32
Copyright © Siemens AG 2007. All rights reserved.
Technical data subject to change
W/R
Addr.: LBU_CS_R_N+0x02
W/R
Addr.: LBU_CS_R_N+0x12
W/R
Addr.: LBU_CS_R_N+0x22
W/R
Addr.: LBU_CS_R_N+0x32
Description
Upper 16 bits for area setting
15:6 are read-only (value: 000h)
5:0 are read/write accessible
W/R
Addr.: LBU_CS_R_N+0x04
W/R
Addr.: LBU_CS_R_N+0x14
W/R
Addr.: LBU_CS_R_N+0x24
W/R
Addr.: LBU_CS_R_N+0x34
Description
Lower 16 bits for offset setting
15:8 are read/write accessible
7:0 are read-only (value: 00h)
W/R
Addr.: LBU_CS_R_N+0x06
W/R
Addr.: LBU_CS_R_N+0x16
W/R
Addr.: LBU_CS_R_N+0x26
W/R
Addr.: LBU_CS_R_N+0x36
Description
Upper 16 bits for offset setting
W/R
Addr.: LBU_CS_R_N+0x08
W/R
Addr.: LBU_CS_R_N+0x18
W/R
Addr.: LBU_CS_R_N+0x28
W/R
Addr.: LBU_CS_R_N+0x38
Description
Reserved
1: Page is a 32-bit page
0: Page is a 16-bit page
Default: 0x0000_0001 (64k)
Default: 0x0000_0010 (1M)
Default: 0x0000_0020 (2M)
Default: 0x0000_0000 (2 k)
Default: 0x0000_0000
Default: 0x0000_0000
Default: 0x0000_0000
Default: 0x0000_2000
Default: 0x0000_1010 (KRAM)
Default: 0x0000_1000 (IRT-Reg)
Default: 0x0000_3000 (EMIF)
Default: 0x0000_4000 (Periph.)
Default: 0x0000_0000 (16Bit)
Default: 0x0000_0001 (32Bit)
Default: 0x0000_0000 (16Bit)
Default: 0x0000_0001 (32Bit)
84
ERTEC 200 Manual
Version 1.1.0

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