Lbu Address Mapping; Figure 12: Interconnection Of Addresses Between Host And Ertec 200 Lbu; Table 22: Address Mapping From The Perspective Of An External Host Processor On The Lbu Port - Siemens ERTEC200 Manual

7.3

LBU Address Mapping

The following table illustrates an example of the ERTEC 200 Address Mapping from the Perspective of an External Host
Processor:
Seg(1:0)
00
00
00
01
01
01
01
01
01
10
10
10
10
10
10
11
11
11
11
11
11
Table 22: Address Mapping from the Perspective of an External Host Processor on the LBU
Port
In this example, a maximum of 1 MB is addressed. The addresses A[19:0] of the host processor are wired to the
LBU_ADR [19:0] for this purpose. In addition, the addresses A[21:20] are necessary for the segment selection. These
are connected to the LBU pins LBU_SEG[1:0].
Host

Figure 12: Interconnection of Addresses between Host and ERTEC 200 LBU

Copyright © Siemens AG 2007. All rights reserved.
Technical data subject to change
AD(19:0) SEGMENT
Distribution
0_0000h 1MB
F_FFFFh
0_0000h 64k
0_FFFFh
1_0000h 64k
Mirrored
F_FFFFh
0_0000h 128k
1_FFFFh
2_0000h 128k
Mirrored
F_FFFFh
0_0000h 16k
0_3FFFh
0_4000h 16k
Mirrored
F_FFFFh
ADR(21:0)
SEGMENT
Size
1MB Page SDRAM (1 Mbyte)
Range: 0010 0000h
Offset: 2000 0000h
1MB Page KRAM (64 Kbytes)
Range: 0001 0000h
Offset: 1010 0000h
1MB Page ext. SRAM (128 Kbytes)
Range: 0002 0000h
Offset: 3000 0000h
Page APB I/O
1MB
Range: 0000 4000h
Offset: 4000 0000h
ADR(19:0)
LBU_ADR(19:0)
LBU_ADR(20)
ADR(21:20)
LBU_SEG(1:0)
77
Comment
ETEC200
LBU
ERTEC 200 Manual
Version 1.1.0